mpc5645s Freescale Semiconductor, Inc, mpc5645s Datasheet - Page 116

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mpc5645s

Manufacturer Part Number
mpc5645s
Description
Mpc5645s Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Electrical characteristics
4.18.5.3
Note that the final JEDEC LPDDR SDRAM specifications (JESD79-4) for LPDDR operation supersedes any specification in
this document.
The SSTL_18 output with ipp_sre[2:0] set to enabling 1.8V LPDDR mode, at the destination, have a rise/fall time (10%-90%)
between 0.4 ns and 1.0 ns over process, voltage, and temperature driving a 70 ohm transmission line with 0.167 ns td terminated
at the destination with 70 ohms to Vtt (0.5*vddet) with 4.0 pf, representing the DDR input capacitance. See Figure 27.
4.18.6
116
vddet
vdd
Data Inputs (DQ, DM, DQS)
V
V
V
V
Data Outputs (DQ, DQS)
V
V
Symbol C
Parameter C
ih(dc)
il(dc)
ih(ac)
il(ac)
oh
ol
f
PIX_CK
t
t
DSU
DHD
P I/O Supply Voltage
P Core Supply Voltage
C DC Input Logic High
C DC Input Logic Low
C AC Input Logic High
C AC Input Logic low
C Output High Voltage
C Output Low Voltage
D VIU2 pixel clock frequency
D VIU2 data setup time
D VIU2 data hold time
Video Input Unit timing
Level
Level
1.8V LPDDR
Clock
Data
Parameter
Description
Ioh=-0.1mA vddet*0.9
Iol=0.1mA
Condition
MPC5645S Microcontroller Data Sheet, Rev. 6
Table 62. 1.8V LPDDR DC Specifications
Table 63. VIU2 timing parameters
f
Figure 30. VIU2 timing diagram
PIX_CLK
1.7
1.08
vddet*0.7
-0.3
vddet*0.8
-0.3
Min
Min
4
1
1.8
1.2
Nom
t
DHD
Typ
1.9
1.32
vddet+0.3
vddet*0.3
vddet+0.3
vddet*0.2
vddet*0.1
t
DSU
Max
Max
64
V
V
V
V
V
V
V
V
Units
Freescale Semiconductor
JESD79-4
JESD79-4
JESD79-4
JESD79-4
JESD79-4
JESD79-4
JESD79-4
MHz
Notes
Unit
ns
ns
SpecID
SpecID
A5.27
A6.1
A6.2
A6.3
A5.28
A5.29
A5.30
A5.31
A5.32
A5.33
A5.34
A5.35
A5.36

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