gc80c520g CORERIVER Semiconductor, gc80c520g Datasheet - Page 89

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gc80c520g

Manufacturer Part Number
gc80c520g
Description
Eprom / Rom / Romless Based 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
[How to Read a SFR Descriptions]
R/W(1)
R/W(0)
P0.7
SP.7
P0
SP
Appendix B :
Open-drain bi-directional port.
Multiplexed low order address/data bus during external memory
access.
Indicate where stack will start.
Increment by PUSH and decrement by POP.
R/W(1)
P0.7
(80h) : Port 0 Register
(81h) : Stack Pointer Register
P0 (80h) : Port 0 Register
SFR Address
R/W(1)
R/W(0)
SP.6
P0.6
R/W(1)
P0.6
R/W(1)
R/W(0)
P0.5
SP.5
R/W(1)
P0.5
R/W(1)
R/W(0)
R/W(1)
P0.4
SP.4
P0.4
R/W(1)
R/W(1)
R/W(0)
P0.3
P0.3
SP.3
SFR Description [80h ~ 87h]
Yellow Color : Bit Addressable
White Color : Byte Addressable
R
W : Unrestricted Write
(n) : Reset Value
: Unrestricted Read
R/W(1)
P0.2
R/W(1)
R/W(1)
P0.2
SP.2
R/W(1)
P0.1
R/W(1)
R/W(1)
P0.1
SP.1
R/W(1)
P0.0
R/W(1)
R/W(1)
P0.0
SP.0
R/W(0)
R/W(0)
SMOD1 SMOD0
R/W(0) R/W(0)
DPH.7
DPL.7
DPL
DPH
PCON
SMOD1 : Timer 1 baudrate double in UART mode 1, 2, 3.
SMOD0 : Enable SM0 access. Don’t modify this bit.
POF
GF1, GF0 : General purpose flag.
PD
IDL
(82h) : Data Pointer Low Register
(83h) : Data Pointer High Register
R/W(0)
R/W(0)
DPH.6
DPL.6
(87h) : Power Control Register
: Power off flag.
: Power-down (Stop) mode bit.
: IDL mode bit.
When power-on, this bit will be set by H/W.
R/W(0)
R/W(0)
DPH.5
DPL.5
-
(1/9)
R/W(0)
R/W(0)
R/W(1) R/W(0) R/W(0) R/W(0) R/W(0)
DPH.4
DPL.4
POF
MiDAS1.0 Family
R/W(0)
R/W(0)
DPH.3
DPL.3
GF1
R/W(0)
R/W(0)
DPH.2
DPL.2
GF0
R/W(0)
R/W(0)
DPH.1
DPL.1
PD
R/W(0)
R/W(0)
DPH.0
DPL.0
IDL
[89]

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