dp83241 National Semiconductor Corporation, dp83241 Datasheet - Page 5

• Manufacturer Part Number: dp83241
• Description: Cdd Device Fddi Clock Distribution Device
• Manufacturer: National Semiconductor Corporation

DV
EXTV
DGND
EXTGND
AGND
AV
XTL IN
XTL OUT
REF IN
FEEDBK IN
REF SEL
FILTER
VCO SEL
XVCO IN
XVCO INB
3 0 Pin Descriptions
Symbol
CC
CC
CC
Pin
No
13
16
28
15
14
18
10
17
12
1
8
6
5
4
9
I O
O
I
I
I
I
I
I
Digital V
to GND A bypass capacitor should be placed as close as possible across the DV
External V
to GND A bypass capacitor should be placed as close as possible across the EXTV
pins
Digital Ground Internal circuit power supply return
External Ground Output buffer power supply return
Analog Ground Substrate ground used to ensure proper device biasing and isolation
Analog V
relative to Ground A bypass cap should be placed as close as possible between AV
External Crystal Oscillator Input XTL IN can also be used as a CMOS compatible reference frequency
input for the PLL This input is selected when REF SEL is at a logical LOW level The component
connections required for oscillator operation are shown in the application diagrams
External Crystal Oscillator Output XTL OUT is not intended for use as a logic drive output pin
Reference Input TTL compatible input for use as the PLL’s phase comparator reference frequency
input when the REF SEL is at a logic HI level This input is for use in concentrator configurations where
there are multiple CDD devices at a given site requiring synchronization
Feedback Input TTL compatible input for use as the PLL’s phase comparator feedback input to close
the loop This input is intended to be driven from one of the LBCs (Local Byte Clocks) This input is
designed to provide the same frequency and within 2 ns of the same phase as REF IN when REF IN is in
active operation
Reference Select TTL compatible input which selects either the crystal oscillator inputs XTL IN and
XTL OUT or the REF IN inputs as the reference frequency inputs for the PLL The crystal oscillator inputs
are selected when REF SEL is at a logic LOW level and the REF IN input is selected as the reference
frequency when REF SEL is at a logic HI level
Filter Low pass PLL loop filter pin A three element filter consisting of one capacitor in parallel with a
resistor and another capacitor should be connected between this pin and ground
VCO Select TTL compatible input used to select either the internal VCO or an external VCO through the
XVCO IN and XVCO INB pins The internal VCO is selected when the VCO SEL pin is at a logic HIGH
level and the external VCO is selected when at a logic LOW level
External VCO Inputs Differential inputs for use with an external VCO These inputs are D C biased to
approximately one half V
VCO To use a single-ended VCO couple the signal into one of the inputs through a series low value
capacitor and bypass the other input to GND through a 0 01 mF capacitor When not in use ground one
input and let the other float
CC
CC
CC
Positive power supply for all the internal circuitry intended for operation at 5V
Positive power supply for the critical analog circuitry intended for
Positive power supply for all the output buffers intended for operation at 5V
CC
and can be connected to either a full differential VCO or a single-ended
5
Description
a
CC
5V operation
CC
CC
and DGND pins
and EXTGND
and AGND
g
g
5% relative
5% relative
g
5%