mpc235 Megawin Technology, mpc235 Datasheet - Page 14

• Manufacturer Part Number: mpc235
• Description: Low-speed Usb Micro-controller
• Manufacturer: Megawin Technology

System Control Registers
Power saving control
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
R
W
Bit 0
√
0200H
PWR_CTL
LVDT
-
-
-
-
-
CKC
HALT
-
LVDT: low-voltage detector disable bit
0 (default): enable low-voltage detector
1: disable low-voltage detector
When the low-voltage detector is enabled, and it senses the power voltage is lower than 3.6V, the chip would be
reset automatically.
CKC: Oscillator control bit. 1: disable OSC, 0: enable OSC
HALT: F
off-line control bit. 1: F
off-line, 0: F
on-line
CPU
CPU
CPU
Program can switch the normal operation mode to the power-saving mode for saving power
consumption through this register. There are two power saving mode in this system.
Stop mode: (PWR_CTL.
= 1)
CKC
System clock stops oscillating. The uC can be awakened from stop mode by 3 ways: port 3 interrupt,
hardware reset, power-on reset, USB host wake up call.
Halt mode: (PWR_CTL.
= 1)
HALT
The F
clock in off-line status. The oscillator oscillates or not depends on the content of
CPU
PWR_CTL.
. The uC can be awakened from halt mode by 3-ways: interrupts ( USB, Timer 0, Port 3,
CKC
Port0.4, Port0.5) assigned in the RLH_EN register, hardware reset, or power-on reset.
14
MEGAWIN
MPC235 Technical Summary