adau1361 Analog Devices, Inc., adau1361 Datasheet - Page 13

• Manufacturer Part Number: adau1361
• Description: Stereo, Low Power, 96 Khz, 24-bit Audio Codec With Integrated Pll
• Manufacturer: Analog Devices, Inc.

PIN CONFIGURATION AND FUNC
Table 10. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Mnemonic
IOVDD
MCLK
ADDR0/CLATCH
JACKDET/MICIN
MICBIAS
LAUX
CM
AVDD
AGND
LINP
LINN
RINP
RINN
RAUX
ROUTP
ROUTN
LOUTN
LOUTP
Type
PWR
D_IN
D_IN
D_IN
A_OUT
A_IN
A_OUT
PWR
PWR
A_IN
A_IN
A_IN
A_IN
A_IN
A_OUT
A_OUT
A_OUT
A_OUT
1
ADDR0/CLATCH
JACKDET/MICIN
NOTES
1. THE EXPOSED PAD IS
ADAU1361 GROUNDS.
SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE SOLDERED TO THE
GROUND PLANE.
MICBIAS
Description
Supply for Digital Input and Output Pins. The digital output pins are supplied from IOVDD,
which also sets the highest input voltage that should be seen on the digital input pins.
IOVDD should be set between 1.8 V and 3.3 V. The current draw of this pin is variable
because it is dependent on the loads of the digital outputs. IOVDD should be decoupled
to DGND with a 100 nF capacitor and a 10 μF capacitor.
External Master Clock Input.
ADDR0: I
CLATCH: SPI Latch Signal. Must go low at the beginning of an SPI transaction and high at
the end of a transaction. Each SPI transaction can take a different number of CCLKs to
complete, depending on the address and read/write bit that are sent at the beginning of
the SPI transaction.
JACKDET: Detect insertion/removal of headphone plug.
MICIN: Digital microphone stereo input.
Bias Voltage for Electret Microphone.
Left Channel Single-Ended Auxiliary Input.
AVDD/2 V Common-Mode Reference. A 10 μF to 47 μF standard decoupling capacitor
should be connected between this pin and AGND to reduce crosstalk between the ADCs
and DACs. This pin can be used to bias external analog circuits, as long as they are not
drawing current from CM (for example, the noninverting input of an op amp).
1.8 V to 3.65 V Analog Supply for DAC and Microphone Bias. This pin should be decoupled
to AGND with a 100 nF capacitor.
Analog Ground. The AGND and DGND pins can be tied together on a common ground
plane. AGND should be decoupled locally to AVDD with a 100 nF capacitor.
Left Channel Noninverting Input or Single-Ended Input 0.
Left Channel Inverting Input or Single-Ended Input 1.
Right Channel Noninverting Input or Single-Ended Input 2.
Right Channel Inverting Input or Single-Ended Input 3.
Right Channel Single-Ended Auxiliary Input.
Right Line Output, Positive.
Right Line Output, Negative.
Left Line Output, Negative.
Left Line Output, Positive.
TION DESCRIPTIONS
IOVDD
MCLK
AVDD
LAUX
CM
1
2
3
4
5
6
7
8
Figure 7. Pin Configuration
2
C Address Bit 0.
Rev. 0 | Page 13 of 80
CONNECTED INTERNALLY TO HE
FOR INCREASED RELIABILIT
ADAU1361
(Not to Scale
PIN 1
INDICATOR
TOP VIEW
)
24 DVDDOUT
23 AVDD
22 AGND
21 MONOOU
20 LHP
19 RHP
18 LOUTP
17 LOUTN
Y O
T
F THE
T
ADAU1361