lm4546a National Semiconductor Corporation, lm4546a Datasheet - Page 25

• Manufacturer Part Number: lm4546a
• Description: Ac ?97 Rev 2 Multi-channel Audio Codec With Sample Rate Conversion And National 3d Sound
• Manufacturer: National Semiconductor Corporation

Multiple Codecs
When reading from a Secondary Codec, the controller must
send the correct Codec ID bits (i.e. the target Codec Identity
in slot 0, bits 1 and 0) along with the read-request bit (slot 1,
bit 19) and target register address (slot 1, bits 18 – 12). To
write to a Secondary Codec, a controller must send the
correct Codec ID bits when slot 1 contains a valid target
register address and “write” indicator bit and slot 2 contains
valid target register data. A write operation is only valid if the
register address and data are both valid and sent within the
same frame. When accessing the Primary Codec, the Codec
ID bits are cleared and the tag bits 14 and 13 resume their
role indicating the validity of Command Address and Data in
slots 1 and 2.
The use of the tag bits in Input Frames (carried by the
SDATA_IN signal) is the same for Primary and Secondary
Codecs.
SLOT 0: TAG bits in Output Frames (controller to codec)
Extended Audio ID register (28h): Support for Multiple Codecs
Bit 15
Frame
Reg
28h
Valid
Slot 1
Extended
Audio ID
Valid
14
Name
Slot 2
Valid
13
D15 D14 D13 D12 D11 D10
ID1
Slot 3
Valid
12
ID0
(Continued)
Slot 4
Valid
11
X
X
10
X
X
X
9
X
D9
X
8
X
25
D8
X
X
7
The Codec Identity is determined by the inverting input pins
ID1#, ID0# (pins 46 and 45) and can be read as the value of
the ID1, ID0 bits (D15, D14) in the Extended Audio ID
register, 28h of the target codec.
Slots in the AC Link Output Frame are always mapped to
carry data to the left DAC channel in slot 3 and data to the
right DAC channel in slot 4. Similarly, slots in AC Link Input
Frames are always mapped such that PCM data from the left
ADC channel is carried by slot 3 and PCM data from the right
ADC channel by slot 4. Output Frames are those carried by
the SDATA_OUT signal from the controller to the codec
while Input Frames are those carried by the SDATA_IN
signal from the codec to the controller.
D7
X
X
6
D6
X
D5
X
5
X
D4
X
X
4
D3
X
3
X
D2
X
2
X
D1
X
VRA X001h
D0
ID1
1
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Default
ID0
0