adav804 Analog Devices, Inc., adav804 Datasheet - Page 26
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adav804
Manufacturer Part Number
adav804
Description
Audio Codec For Recordable Dvd
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADAV804.pdf
(54 pages)
ADAV804
INTERFACE CONTROL
The ADAV804 has a dedicated control port to allow the internal
registers of the ADAV804 to be accessed. Each of the internal
registers is 8 bits wide. Where bits are described as reserved
(RES) these bits should be programmed as zero.
I
The I
consisting of a clock line, SCL and a data line, SDA. SDA is
bidirectional and the ADAV804 will drive SDA either to
acknowledge the master, ACK, or to send data during a read
operation. The SDA pin for the I
2
C Interface
2
C interface of the ADAV804 is a two wire interface
2
C port is an open drain
DIR PLL (256 × f S )
DIR PLL (512 × f S )
DIR PLL (256 × f S )
DIR PLL (512 × f S )
REFERENCE
ADC
DAC
PLLINT1
PLLINT2
PLLINT1
PLLINT2
PLL
MCLKI
MCLKI
PLLINT1
PLLINT2
PLLINT1
PLLINT2
MCLKI
MCLKI
REGISTERS
XIN
XIN
CONTROL
REG: 0x76
REG: 0x76
XIN
XIN
REG: 0x76
BITS 4-2
BITS 7-5
BITS 1-0
REG: 0x77
BITS 4-3
Figure 34. Sport Clocking Scheme
DIR PLL (512 × f S )
DIR PLL (256 × f S )
Rev. Pr G | Page 26 of 54
OSCILLATOR
MCLK
MCLK
BITS 3-2
BITS 4-5
PLL CLOCK
PLL CLOCK
REG: 0x00
REG: 0x00
Figure 35. Data Path
DIVIDER
DIVIDER
ADC
DAC
SRC
ICLK1
ICLK2
PLAYBACK
ICLK1
ICLK2
INPUT
DATA
ICLK1
ICLK2
REG: 0x00
BIT 1-0
OUTPUT
collector and requires a 1KΩ pullup resistor. A write or read
access occurs when the SDA line is pulled low while the SCL
line is high indicated by START in the timing diagrams. SDA is
only allowed to change when SCL is low except when a START
or STOP condition occurs as shown in figures 36 and 37. The
first eight bits of the access consist of the device address and the
R/W bit. The device address consists of an internal built-in
address (0b00100) and two address pins, AD1 and AD0. The
two address pins allow up to four ADAV804s to be used in a
system. Initiating a write operation to the ADAV804 involves
sending a START condition and then sending the device
address with the R/W set low. The ADAV804 will respond by
issuing an ACK to indicate that it has been addressed. The user
INPUT
PORT
PORT
INPUT
DATA
REG:0X04
BITS 4-3
AUX
REG:0x06
BITS 4-3
REG: 0x00
BITS 1-0
DIVIDER
MCLK
SRC
DIR
RECORD
OUTPUT
OUTPUT
DATA
DATA
AUX
DIT
Preliminary Technical Data
OLRCLK
OBCLK
OSDATA
ILRCLK
IBCLK
ISDATA