adav804 Analog Devices, Inc., adav804 Datasheet - Page 7
![no-image](/images/no-image-200.jpg)
adav804
Manufacturer Part Number
adav804
Description
Audio Codec For Recordable Dvd
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADAV804.pdf
(54 pages)
- Current page: 7 of 54
- Download datasheet (548Kb)
Preliminary Technical Data
TIMING SPECIFICATIONS
Table 15.
Parameter
MASTER CLOCK AND RESET
I
SERIAL PORTS
1
Table 16. Temperature Range
Specifications Guaranteed
Functionality Guaranteed
Storage
Specifications subject to change without notice.
2
The prefix x refers to I-, O-, IAUX- or OAUX- for the full pin name
C PORT
f
f
t
f
t
t
Start Condition -
t
t
t
t
t
Stop Condition
Slave Mode
Master Mode
MCLK
XIN
SCL
RESET
SCLH
SCLL
DS
SCR
SCF
SDR
SDF
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
SBF
SCS
SCH
SCS
SBH
SBL
SLS
SLH
SDS
SDH
SDD
MLD
MDD
MDS
MDH
1
MCLKI Frequency
XIN Frequency
RESET Low
SCL Clock Frequency
SCL High
SCL Low
Setup Time
Hold Time
Data Setup Time
SCL Rise Time
SCL Fall Time
SDA Rise Time
SDA Fall Time
Setup Time
xBCLK High
xBCLK Low
xBCLK Frequency
xLRCLK Setup
xLRCLK Hold
xSDATA Setup
xSDATA Hold
xSDATA Delay
xLRCLK Delay
xSDATA Delay
xSDATA Setup
xSDATA Hold
Rev. Pr G | Page 7 of 54
Min
20
0.6
1.3
0.6
0.6
100
0.6
40
40
64 × f
10
10
10
10
10
10
10
Min
−40
−65
S
24.576
54
400
300
300
5
10
Max
300
300
Typ
25
Unit
MHz
MHz
ns
kHz
µS
µS
µS
µS
ns
ns
ns
ns
ns
µS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Comments
Relevant for Repeated Start
Condition
After this period the 1st clock is
generated
To xBCLK Rising Edge
From xBCLK Rising Edge
To xBCLK Rising Edge
From xBCLK Rising Edge
From xBCLK Falling Edge
From xBCLK Falling Edge
From xBCLK Falling Edge
From xBCLK Rising Edge
From xBCLK Rising Edge
85
150
Max
ADAV804
Units
°C
°C
°C
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