adav802 Analog Devices, Inc., adav802 Datasheet - Page 31
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adav802
Manufacturer Part Number
adav802
Description
Audio Codec For Recordable Dvd
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADAV802.pdf
(53 pages)
- Current page: 31 of 53
- Download datasheet (527Kb)
Preliminary Technical Data
Table 32. Group Delay and Mute Register
ADDRESS = 0001000
MUTE_SRC
GRPDLY6-0
Table 33. Receiver Configuration 1 Register
ADDRESS = 0001001
NOCLOCK
RXCLK1-0
AUTO_DEEMPH
ERR1-0
LOCK1-0
NO- CLOCK
7
Selects the source of the Receiver Clock when the PLL is not locked
0 = The Recovered PLL Clock is used
1 = ICLK1 is used
Determines the oversampling ratio of the Recovered Receiver Clock
00 = RxCLK is a 128 × f
01 = RxCLK is a 256 × f
10 = RxCLK is a 512 × f
11 = Reserved
Automatically de-emphasizes the data from the receiver based on the
Channel Status Information
0 = Automatic De-emphasis is disabled
1 = Automatic De-emphasis is enabled
Defines what action the receiver should take if the receiver detects a parity or
biphase error
00 = No action will be taken
01 = The last valid sample is held
10 = The invalid sample is replaced with zeros
11 = Reserved
Defines what action the receiver should take if the PLL loses lock.
00 = No action will be taken
01 = The last valid sample will be held
10 = Zeros will be sent out after the last valid sample
11 = Soft Mute of the last valid audio sample
MUTE_SRC
7
Soft Mutes the Output of theSample Rate Converter
0 = No Mute
1 = Soft Mute
Adds delay to the Sample Rate Converter FIR filter by GRPDLY6-0 Input Samples
0000000 = No Delay
0000001 = 1 Sample Delay
0000010 = 2 Sample Delay
1111110 = 126 Sample Delay
1111111 = 127 Sample Delay
S
S
S
RXCLK1-0
6,5
recovered clock
recovered clock
recovered clock
Rev. Pr G | Page 31 of 53
AUTO_ DEEMPH
4
GRPDLY6-0
6,5,4,3,2,1,0
ERR1-0
3,2
LOCK1-0
1,0
ADAV802
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