adav802 Analog Devices, Inc., adav802 Datasheet - Page 50

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adav802

Manufacturer Part Number
adav802
Description
Audio Codec For Recordable Dvd
Manufacturer
Analog Devices, Inc.
Datasheet
ADAV802
Table 85. Internal Clocking Control Register 2
ADDRESS = 1110111
ICLK1-0
PLL2INT1-0
PLL1INT
Table 86. PLL Clock Source Register
ADDRESS = 1111000
PLL1_Source
PLL2_Source
Table 87. PLL Output Enable Register
ADDRESS = 1111010
DIRIN_PIN
SYSCLK1
SYSCLK2
SYSCLK3
Selects the clock source for PLL1
0 = XIN
1 = MCLKI
Selects the clock source for PLL2
0 = XIN
1 = MCLKI
This bit determines the input levels of the DIRIN pin
0 = The DIRIN will accept input signals down to 200mV according to AES3 requirements
1 = The DIRIN will accept input signals as defined in Table 13
Enables the SYSCLK1 Output
0 = Enabled
1 = Disabled
Enables the SYSCLK2 Output
0 = Enabled
1 = Disabled
Enables the SYSCLK3 Output
0 = Enabled
1 = Disabled
Source Selector for Internal Clock ICLK1
00 = XIN
01 = MCLKI
10 = PLLINT1
11 = PLLINT2
PLL2 Internal Selector (See Figure 18)
00 = FS2
01 = FS2/2
10 = FS3
11 = FS3/2
PLL1 Internal Selector
0 = FS1
1 = FS1/2
PLL1_Source
7
RES
7
RES
7
PLL2_Source
6
RES
6
RES
6
RES
5
RES
5
RES
5
ICLK1-1
4
Rev. Pr G | Page 50 of 53
RES
4
DIRIN_PIN
4
ICLK1-0
3
RES
3
RES
3
PLL2INT1
2
Preliminary Technical Data
RES
2
SYSCLK1
2
PLL2INT0
1
RES
1
SYSCLK2
1
PLL1INT
0
RES
0
SYSCLK3
0

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