at83c5122 ATMEL Corporation, at83c5122 Datasheet - Page 144
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at83c5122
Manufacturer Part Number
at83c5122
Description
At83c5123 C51 Microcontroller With Usb And Smart Card Reader Interfaces
Manufacturer
ATMEL Corporation
Datasheet
1.AT83C5122.pdf
(213 pages)
- Current page: 144 of 213
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144
AT8xC5122/23
Table 85. Serial Peripheral Control Register - SPCON (C3h)
Reset Value = 00010100b
Number
SPR2
Bit
7
6
5
4
3
2
1
0
7
Mnemonic
SSDIS
MSTR
SPR2
SPEN
CPOL
CPHA
SPR1
SPR0
SPEN
Bit
6
Mode
R/W
RW
RW
RW
RW
RW
RW
RW
RW
SSDIS
5
Description
Serial Peripheral Rate 2
Bit with SPR1 and SPR0 define the clock rate
Serial Peripheral Enable
Clear to disable the SPI interface (internal reset of the SPI)
Set to enable the SPI interface
SS Disable
Clear to enable SS in both Master and Slave modes
Set to disable SS in both Master and Slave modes. In Slave mode, this
bit has no effect if CPHA = ’0’
Serial Peripheral Master
Clear to configure the SPI as a Slave
Set to configure the SPI as a Master
Clock Polarity
Clear to have the SCK set to ’0’ in idle state
Set to have the SCK set to ’1’ in idle low
Clock Phase
Clear to have the data sampled when the SPSCK leaves the idle state
(see CPOL)
Set to have the data sampled when the SPSCK returns to idle state
(see CPOL)
Serial Peripheral Rate (SPR2:SPR1:SPR0)
000: Reserved
001: F
010: F
011: F
100: F
101: F
110: F
111: Reserved
CK_SPI
CK_SPI
CK_SPI
CK_SPI
CK_SPI
CK_SPI
MSTR
4
/16
/128
/8
/32
/64
/4
CPOL
3
CPHA
2
SPR1
1
4202E–SCR–06/06
SPR0
0
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