mc33696fje/r2 Freescale Semiconductor, Inc, mc33696fje/r2 Datasheet - Page 40

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mc33696fje/r2

Manufacturer Part Number
mc33696fje/r2
Description
Mc33696 Pll Tuned Uhf Transceiver
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Controller
State 13: A header, or its complement, has been received. Data and clock signals are output on the SPI port
until EOM indicates the end of the data sequence. If the complement of the header has been received,
output data are complemented also.
When an EOM occurs before the current byte is fully shifted out, dummy bits are inserted until the number
of shifted bits is a multiple of 8.
For all states: At any time, a low level applied to STROBE forces the circuit to state 10, and a low level
applied on CONFB forces the state machine to state 1.
40
SPI Master
On Counter = RON[3:0]
and STROBE ≠ 1
Time Out
Figure 34. Receive Mode, DME = 1, SOE = 1
Off Counter = ROFF[2:0]
MC33696 Data Sheet, Rev. 9
and STROBE ≠ 1
Header Received
or STROBE = 1
EOM Received
STROBE = 0
Waiting for End of Message
ID Detected
Waiting for a Valid Header
Output Data and Clock
Waiting For a Valid ID
State 10
State 11
State 12
State 13
Off
On
On
On
STROBE = 0
EOM Received
and STROBE = 1
Freescale Semiconductor
STROBE = 1

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