adm6995 ETC-unknow, adm6995 Datasheet - Page 34

• Manufacturer Part Number: adm6995
• Description: Port 10/100 Mb/s Single Chip Ethiernet Switch Controller
• Manufacturer: ETC-unknow

ADM6995L
ADMtek Inc.
Bits
1:0
3:2
5:4
7:6
9:8
11:10 R/W Mapped priority of tag value (TOS) 5.
Bits
5:0
6
7
14:8
15
Bits
1:0
3:2
5:4
7:6
9:8
11:10 R/W Mapped priority of tag value (VLAN) 5.
13:12 R/W Mapped priority of tag value (VLAN) 6.
15:14 R/W Mapped priority of tag value (VLAN) 7.
Bits
15:0
4.3.4 Configuration Register, offset: 0x0bh
4.3.5 Reserved Register, offset: 0x0ch~0x0dh
4.3.6
4.3.7 TOS priority Map Register, offset: 0x0fh
Note:
Value 3 ~ 0 are for priority queue Q3~Q0 respectively.
The Weight ratio is Q3 : Q2 : Q1: Q0 = 8 : 4 : 2 : 1.
The default is port-base priority for un-tag packet and non_IP frame.
Type Description
Type Description
Type Description
Type Description
R/W Enable IPG leveling. 1/92 bit. 0/96 bit.
R/W Enable Trunk. 1: enable Port3, 4 as Trunk port. 0: disable.
R/W Disable Far_End_Fault detection. 1: disable. 0: enable.
R/W Mapped priority of tag value (VLAN) 0.
R/W Mapped priority of tag value (VLAN) 1.
R/W Mapped priority of tag value (VLAN) 2.
R/W Mapped priority of tag value (VLAN) 3.
R/W Mapped priority of tag value (VLAN) 4.
R/W Mapped priority of tag value (TOS) 0.
R/W Mapped priority of tag value (TOS) 1.
R/W Mapped priority of tag value (TOS) 2.
R/W Mapped priority of tag value (TOS) 3.
R/W Mapped priority of tag value (TOS) 4.
RO Reserved
RO Reserved
RO Reserved
VLAN priority Map Register, offset: 0x0eh
Note:
When this bit is enabled ADM6995L will transmit packet out at 92 bit
IPG to clean buffer. If user disables this function then ADM6995L will
transmit packet at 96 bit.
Register Description
Initial value
Initial value
Initial value
Initial value
0xfa5h
0x0h
0x0h
0x0h
0x0h
0x1h
0x0h
0x0h
0x1h
0x1h
0x2h
0x2h
0x3h
0x3h
0x0h
0x0h
0x1h
0x1h
0x2h
0x2h
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