adm6995 ETC-unknow, adm6995 Datasheet - Page 4

• Manufacturer Part Number: adm6995
• Description: Port 10/100 Mb/s Single Chip Ethiernet Switch Controller
• Manufacturer: ETC-unknow

ADMtek Inc.
ADM6995L
Chapter 4 Register Description .................................................................................... 4-1
3.9
3.10
3.11
3.12
3.13
3.14
3.15
3.16
3.17
3.18
3.19
3.20
4.1
4.2
4.3
3.15.1
3.15.2
3.15.3
3.15.4
3.15.5
3.15.6
3.15.7
3.15.8
3.15.9
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
4.3.11
4.3.12
4.3.13
4.3.14
4.3.15
4.3.16
4.3.17
4.3.18
4.3.19
4.3.20
4.3.21
Link Test Function........................................................................................... 3-8
Auto TP MDIX function................................................................................ 3-12
EEPROM Content............................................................................................ 4-1
EEPROM Register Map................................................................................... 4-1
EEPROM Register ........................................................................................... 4-2
Automatic Link Polarity Detection.............................................................. 3-8
Clock Synthesizer ........................................................................................ 3-8
Auto Negotiation.......................................................................................... 3-8
Memory Block ............................................................................................. 3-9
Switch Functional Description..................................................................... 3-9
Basic Operation............................................................................................ 3-9
Port Locking............................................................................................... 3-12
VLAN setting & Tag/Untag & port-base VLAN ...................................... 3-12
Priority Setting ........................................................................................... 3-13
LED Display .............................................................................................. 3-14
Address Learning ................................................................................... 3-10
Address Recognition and Packet Forwarding ....................................... 3-10
Address Aging ........................................................................................ 3-10
Back off Algorithm ................................................................................. 3-11
Inter-Packet Gap (IPG) ......................................................................... 3-11
Illegal Frames........................................................................................ 3-11
Half Duplex Flow Control ..................................................................... 3-11
Full Duplex Flow Control...................................................................... 3-11
Broadcast Storm filter............................................................................ 3-11
Signature Register, offset: 0x00h.............................................................. 4-2
Configuration Registers, offset: 0x01h ~ 0x09h ...................................... 4-3
Reserved Register, offset: 0x0ah.............................................................. 4-3
Configuration Register, offset: 0x0bh...................................................... 4-4
Reserved Register, offset: 0x0ch~0x0dh .................................................. 4-4
VLAN priority Map Register, offset: 0x0eh ............................................. 4-4
TOS priority Map Register, offset: 0x0fh................................................. 4-4
Packet with Priority: Normal packet content .......................................... 4-5
VLAN Packet............................................................................................ 4-5
TOS IP Packet.......................................................................................... 4-6
Miscellaneous Configuration Register, offset: 0x10h.............................. 4-6
VLAN mode select Register, offset: 0x11h............................................... 4-7
Miscellaneous Configuration register, offset: 0x12h .............................. 4-7
VLAN mapping table registers, offset: 0x22h ~ 0x13h ............................ 4-8
Reserved Register, offset: 0x27h ~ 0x23h................................................ 4-8
Port0 PVID bit 11 ~ 4 Configuration Register, offset: 0x28h ................. 4-8
Port1 PVID bit 11 ~ 4 Configuration Register, offset: 0x29h ................. 4-8
Port2 PVID bit 11~4 Configuration Register, offset: 0x2ah ................... 4-9
Port3, 4 PVID bit 11~4 Configuration Register, offset: 0x2bh ............... 4-9
VLAN group shift bits Configuration Register, offset: 0x2ch .................. 4-9
Reserved Register, offset: 0x2dh.............................................................. 4-9
V1.0
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