s1r72805 Epson Electronics America, Inc., s1r72805 Datasheet
s1r72805
Available stocks
Related parts for s1r72805
s1r72805 Summary of contents
Page 1
... IEEE1394 Link/Transaction USB1.1 Controller DESCRIPTION S1R72805 has the built-in Link/Transaction and USB1.1 Controller conforming to IEEE Std. 1394-1995, P1394a Draft 2.0 and enables to bridge either of both Interface and IDE CPU/Flash ROM is provided to this IC and part of the transaction is made as Hardware and if the address and the sized of Page Table in SBP-2 are set to this IC, This IC will come to automatically following Page Table Fetch and transmit data ...
Page 2
... S1R72805 BLOCK DIAGRAM 48MHz Clock controller OSCIN OSCOUT Clock allocation Suspend/Resume IDE Interface section HDD15-0 HDA2-0 Master controller XHCS1-0 HDMARQ Slave controller XHIOW XHIOR Ultra controller HIORDY XHDMACK HINTRQ Internal FIFO controller XHPDIAG XHDASP XHRST Internal CPU section S1C33-CPU GPIO7-0 PTM/GPIO ...
Page 3
... PIN ASSIGNMENT S1R72805 (QFP15-100pin HDD5 77 HDD10 78 79 HDD4 HDD11 HDD3 HDD12 83 84 HDD2 HDD13 HDD1 HDD14 88 89 HDD0 HDD15 HDMARQ XHIOW 93 94 XHIOR INDEX INDEX INDEX INDEX HIORDY XHDMACK HINTRQ 98 99 HDA1 ...
Page 4
... S1R72805 PIN DESCRIPTION Control signals with “X” prefixed to pin names are low active. Pin No. Signal I/O Reset Relation to IEEE1394 PHY Interface (18 Is/O HI-Z Data bus with PHY CTL1 Is/O HI-Z Control signal with PHY 48 CTL0 57 LREQ O LOW Request signal to PHY ...
Page 5
... Internal Flash ROM Test Signal (Connect this pin to V usually.) DD Power supply GND Ood : Output Ood : Open drain output Otrd : Tristate output EPSON S1R72805 Remarks - Drive capability 2mA - - - Drive capability 2mA Drive capability 2mA Drive capability 2mA Drive capability 2mA 5V tolerance, ...
Page 6
... S1R72805 MEMORY MAP Total Memory Space The memory map of this IC is shown in the figure blow. (For the built-in S1C33, 2-Clock is the minimum cycle.) Address 0xC0FFFF Flash ROM 0xC00000 Reserved 0x05FFFF S1C33-Mini Core Reg 0x030000 Reserved 0x011FFF 1394/USB Buffer 0x010000 0x002100 Reserved ...
Page 7
... USB operation at the time of access. Rev.1.0 8KB (RxHeaderAreaStart) (RingBuffer) RxORBAreaStart RxORBArea (RingBuffer) TxHeaderAreaStart (TxHeaderAreaStart + 0x0040) TxORBArea (RingBuffer) TxStreamAreaStart (RingBuffer) TxStreamAreaEnd NotUsed RxStreamAreaStart (RingBuffer) used Isocronouse TxAreaStart + 0x20 + 0x30 + 0x40 EPSON S1R72805 IDE->1394 DMA Area 1394->IDE DMA Area AsyTxPktHdr 0 IsoTxPktHdr 0 IsoTxPktHdr 1 7 ...
Page 8
... S1R72805 NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products ...