peb2025 ETC-unknow, peb2025 Datasheet
peb2025
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peb2025 Summary of contents
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ISDN Exchange Power Controller (IEPC) Features Supplies power four transmission lines CCITT recommendations compatible for power feed at the “S” interface Each line is individually powered and controlled Wide field of applications: – two- and four wire ...
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Programmable output current and thermal shut down guards the IEPC against overloads. The IEPC offers a special transient permitted overload state. Momentary overloads within a specified range e.g. by connecting powered line, however, will not activate ...
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Pin Definitions and Functions Pin No. Pin No. P-DIP-22 P-LCC-28 17 21, 22 19, 18, 16, 25, 24, 20 21, 20, 14, 28, 26, 18 ...
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Pin Definitions and Functions (cont’d) Pin No. Pin No. P-DIP-22 P-LCC- – 6, 10, 17, 27 N.C. Figure 1 Functional Block Diagram Semiconductor Group Symbol Input (I) Function Output (O) INT O Interrupt: Open drain output. If any ...
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Figure 2 IEPC Architecture Semiconductor Group 5 PEB 2025 ...
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Figure 3 Functional Diagram of One Line Driver Semiconductor Group 6 PEB 2025 ...
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Functional Description Figure 2 shows the IEPC organization. The exchange power controller contains one line driver for each of the four transmission lines. A line oriented register architecture allows very simple software control. Figure 3 shows the functional diagram of ...
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Figure 4 Diagram of the Transient Permitted Overload (TPO) State t During the first timestep ( OFF1 the current will be limited. Within the next timestep ( till otherwise the line driver turns off. After max t ...
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If overload is once detected, every exceeding of the current limits will turn off the line driver until t is reached. The time dependent current limiting circuit will not be reseted if once overload is OFF4 detected, even if the ...
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Figure 5 Open Loop Detection Digital Part The microprocessor interface (MPI) communicates with a processor which controles the IEPC. This MPI contains a 3-bit data bus, a 2-bit address bus, read-, write-, chip select- and reset lines. If chip select ...
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Address Table Write Register The write register is organized as shown below: D2i D1i D0i Automatic Restart Bit: Automatic restart mode is only possible in connection with the ...
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ON/OFF-Bit: To turn a line driver on, D1i must be set to high, to turn it off, it must be set to low. An off command resets the time and current dependent turn off characteristic by discharging the external capacitor ...
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Actual ON/OFF Driver Status-Bit: D1i shows the actual status of the line driver of line i: Driver D2i Driver ON x Driver OFF x Current Overload-Bit aFi overload bit will be set. If CLCi is connected to GND, ...
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Figure 6 Line Driver State Diagram Semiconductor Group 14 PEB 2025 ...
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State Diagram Figure 6 shows the state diagram of one IEPC line driver. A logic high on the RES input sets the device into the initial state. The line driver is switched off and all registers are cleared. The same ...
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Absolute Maximum Ratings Parameter V referred to GND BAT V referred to GND CC Voltage on pins aF0 - aF3 Continuous current on pins aF0 - aF3 only one channel all channels at the same time; all channels at the ...
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DC Characteristics ˚ – – BAT Parameter Supply Supply current Digital supply current Line Drivers Current control limit Current control limit I Current limiting factor ( ) aFi ...
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AC Characteristics ˚ – – BAT Parameter Line Driver & Current Control Delay: ON-command to turn on line driver Delay: ON-command to turn off line driver C charge current T ...
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Figure 7 Waveforms Semiconductor Group 19 PEB 2025 ...
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Protection Requirements According to the absolute maximum ratings of the IEPC, the PEB 2025 has to be protected against overvoltage spikes comming in on aFi. This is done by the diodes D1 and D2 in figure 8. In some applications ...
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Plastic Leaded Chip Carrier, P-LCC-28-R (SMD) Plastic Dual In-Line Package, P-DIP-22 SMD = Surface Mounted Device Semiconductor Group Package Outlines 21 Dimension in mm ...