z80c30 ZiLOG Semiconductor, z80c30 Datasheet - Page 46

• Manufacturer Part Number: z80c30
• Description: Cmos Scc Serial Communications Controller
• Manufacturer: ZiLOG Semiconductor

Interface
to SCC
RR1
– All Sent bypasses MUX and equals contents of SCC Status Register
– Parity Bits bypasses MUX and does the same
– EOF is set to 1 whenever reading from the FIFO
In SDLC Mode the following definitions apply
2 Bits
6-Bit MUX
Overrun, CRC Error
5 Bits
SCC Status Reg
Residue Bits (3)
6 Bits
RR1
10 Deep by 19 Bits Wide
5 Bits
Bit 7 Bit 6
FIFO Array
EOF = 1
RR7 D7
FIFO Overflow Status Bit
MSB pf RR(7) is set on Status FIFO overflow
Frame Status FIFO Circuitry
RR7 D6
FIFO Data available status bit Status Bit set to 1
When reading from FIFO
Bits 5-0
Byte Counter
6 Bits
14 Bits
RR7 D5-D0 + RR6 D7-D0
Byte Counter Contains 14 bits
for a 16 KByte maximum count
RR6
8 Bits
EN
End of Frame Signal
Status Read Comp
Reset on Flag Detect
Increment on Byte Detection
Enable Count in SDLC
Over
4-Bit Comparator
4-Bit Counter
Head Pointer
4-Bit Counter
Tail Pointer
Equal
WR(15) Bit 2
Set Enables
Status FIFO
FIFO Enable