z80230 ZiLOG Semiconductor, z80230 Datasheet - Page 7
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z80230
Manufacturer Part Number
z80230
Description
Esc Enhanced Serial Communication Controller
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z80230.pdf
(12 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
z8023010VSC
Manufacturer:
ZILOG
Quantity:
1 831
AC CHARACTERISTICS
Z80230 Read/Write Timing Table
No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Symbol
TwAS
TdDS(AS)
TsCSO(AS)
ThCSO(AS)
TsCS1(DS)
ThCS1(DS)
TslA(AS)
ThlA(AS)
TsRWR(DS)
ThRW(DS)
TsRWW(DS)
TdAS(DS)
TwDSl
TrC
TsA(AS)
ThA(AS)
TsDW(DS)
ThDW(DS)
TdDS(DA)
TdDSr(DR)
TdDSf(DR)
TdAS(DR)
TdDS(DRz)
TdA(DR)
TdDS(W)
TdDSf(REQ)
TdDSr(REQ)
TdAS(INT)
TdAS(DSA)
TwDSA
TdDSA(DR)
TslEl(DSA)
ThlEl(DSA)
TdlEl(IEO)
TdAS(IEO)
TdDSA(INT)
TdDS(ASQ)
TdASQ(DS)
TwRES
TwPCl
Parameter
/AS Low Width
/DS Rise to /AS Fall Delay
/CS0 to /AS Rise Setup Time
/CS0 to /AS Rise Hold Time
CS1 to /DS Fall Setup Time
CS1 to /DS Rise Hold Time
/INTACK to /AS Rise Setup Time
/INTACK to /AS Rise Hold Time
R//W (Read) to /DS Fall Setup Time
R//W to /DS Rise Hold Time
R//W (Write) to /DS Fall Setup Time
/AS Rise to /DS Fall Delay
/DS Low Width
Valid Access Recovery Time
Address to /AS Rise Setup Time
Address to /AS Rise Hold Time
Write Data to /DS Fall Setup Time
Write Data to /DS Rise Hold Time
/DS Fall to Data Active Delay
/DS Rise to Read Data Not Valid Delay
/DS Fall to Read Data Valid Delay
/AS Rise to Read Data Valid Delay
/DS Rise to Read Data Float Delay
Address Required Valid to Read Data Valid Delay
/DS Fall to Wait Valid Delay
/DS Fall to /W//REQ Not Valid Delay
/DS Fall to /DTR//REQ Not Valid Delay
/AS Rise to /INT Valid Delay
/AS Rise to /DS Fall (Acknowledge) Delay
/DS (Acknowledge) Low Width
/DS Fall (Acknowledge) to Read Data Valid Delay
IEI to /DS Fall (Acknowledge) Setup Time
IEI to /DS Rise (Acknowledge) Hold Time
IEI to IEO Delay
/AS Rise to IEO Delay
/DS Fall (Acknowledge) to /INT Inactive Delay
/DS Rise to /AS Fall Delay for No Reset
/AS Rise to /DS Fall Delay for No Reset
/AS and /DS Coincident Low for Reset
PCLK Low Width
4TcPc
Min
125
125
225
125
100
30
10
20
50
20
10
50
20
10
20
10
80
15
15
40
0
0
0
0
0
0
0
10 MHz
4TcPc
Max
190
210
160
160
500
450
100
120
175
35
90
4TcPc
Min
100
20
10
15
35
10
10
30
15
80
10
10
10
50
75
70
50
10
10
75
26
0
0
0
0
0
0
0
16 MHz
4TcPc
1000
Max
110
100
175
200
70
20
60
60
45
80
Notes*
[1]
[1]
[1]
[1]
[2]
[1]
[1]
[3]
[4]
[4]
[5]
[6]
[4]
[7]
[1]
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