sab-c167cs-l16m3v Infineon Technologies Corporation, sab-c167cs-l16m3v Datasheet - Page 61
sab-c167cs-l16m3v
Manufacturer Part Number
sab-c167cs-l16m3v
Description
16-bit Single-chip Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAB-C167CS-L16M3V.pdf
(81 pages)
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The timings listed in the AC Characteristics that refer to TCLs therefore must be
calculated using the minimum TCL that is possible under the respective circumstances.
The actual minimum value for TCL depends on the jitter of the PLL. As the PLL is
constantly adjusting its output frequency so it corresponds to the applied input frequency
(crystal or oscillator) the relative deviation for periods of more than one TCL is lower than
for one single TCL (see formula and
For a period of
deviation D
where
So for a period of 3 TCLs @ 25 MHz (i.e.
and (3TCL)
This is especially important for bus cycles using waitstates and e.g. for the operation of
timers, serial interfaces, etc. For all slower operations and longer periods (e.g. pulse train
generation or measurement, lower baudrates, etc.) the deviation caused by the PLL jitter
is neglectible.
Note: For all periods longer than 40 TCL the N=40 value can be used (see
Figure 12
Data Sheet
±26.5
±30
±20
±10
(
N
ns
±1
N
= number of consecutive TCLs and 1
Max. jitter
1
TCL)
This approximated formula is valid for
1
N
min
:
N
Approximated Maximum Accumulated PLL Jitter
= 3TCL
min
5
40 and 10 MHz
N
D
=
N
N
TCL the minimum value is computed using the corresponding
10
NOM
TCL
- 1.288 ns = 58.7 ns (@
f
CPU
NOM
40 MHz.
- D
20
Figure
N
; D
N
N
57
[ns] = (13.3 +
= 3): D
12).
N
3
f
CPU
= (13.3 +
40.
= 25 MHz).
N
3
6.3) /
40
6.3) / 25 = 1.288 ns,
C167CS-L16M3V
f
CPU
10 MHz
16 MHz
20 MHz
25 MHz
33 MHz
40 MHz
Low Power
[MHz],
V1.0, 2001-10
Figure
MCD04413B
N
12).
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