sab-c167cs-l16m3v Infineon Technologies Corporation, sab-c167cs-l16m3v Datasheet - Page 64

• Manufacturer Part Number: sab-c167cs-l16m3v
• Description: 16-bit Single-chip Microcontroller
• Manufacturer: Infineon Technologies Corporation

A/D Converter Characteristics
(Operating Conditions apply)
Table 13
Parameter
Analog reference supply
Analog reference ground
Analog input voltage range
Basic clock frequency
Conversion time
Calibration time after reset
Total unadjusted error
Internal resistance of
reference voltage source
Internal resistance of
analog source
ADC input capacitance
1)
2)
3)
4)
5)
Data Sheet
TUE is tested at
within the defined voltage range.
If the analog reference supply voltage exceeds the power supply voltage by up to 0.2 V
(i.e.
The specified TUE is guaranteed only if the absolute sum of input overload currents on Port 5 pins and P1H
pins (see
During the reset calibration sequence the maximum TUE may be 8 LSB ( 12 LSB for channels 16 … 23).
V
these cases will be X000
The limit values for
This parameter includes the sample time
result register with the conversion result.
Values for the basic clock
This parameter depends on the ADC control logic. It is not a real maximum value, but rather a fixum.
During the conversion the ADC’s capacitance must be repeatedly charged or discharged. The internal
resistance of the reference voltage source must allow the capacitance to reach its respective voltage level
within each conversion step. The maximum internal resistance results from the programmed conversion
timing.
AIN
V
may exceed
AREF
I
OV
=
V
specification) does not exceed 10 mA.
DD
A/D Converter Characteristics
V
= +0.2 V) the maximum TUE is increased to 5/11 LSB. This range is not 100% tested.
V
AREF
f
AGND
BC
must not be exceeded when selecting the CPU frequency and the ADCTC setting.
= 3.3 V,
H
or
t
or X3FF
BC
V
depend on programming and can be taken from
AREF
V
Symbol
V
V
V
f
t
t
TUE
R
R
C
AGND
BC
C
CAL
H
AREF
AGND
AIN
AREF
ASRC
AIN
up to the absolute maximum ratings. However, the conversion result in
, respectively.
= 0 V,
t
S
SR
SR
SR
CC
CC
SR
SR
CC
CC
, the time for determining the digital result and the time to load the
1)
V
DD
min.
2.6
V
V
0.5
–
–
–
–
–
–
–
60
= 3.2 V. It is guaranteed by design for all other voltages
SS
AGND
Limit Values
- 0.1
max.
V
V
V
40
+ 2
3328
t
- 0.25
t
- 0.25
33
6.25
BC
S
4
10
DD
SS
AREF
/450
t
t
/60
BC
CPU
+ 0.2
+ 0.1
t
BC
+
t
S
Table
Unit Test
V
V
V
MHz
–
–
LSB Channels
LSB Channels
k
k
pF
C167CS-L16M3V
14.
Condition
1)
–
2)
3)
4)
t
0 … 15
16 … 23
t
t
6)
CPU
BC
S
Low Power
V1.0, 2001-10
in [ns]
in [ns]
= 1/
6)7)
f
CPU
5)6)