cyv15g0204rb Cypress Semiconductor Corporation., cyv15g0204rb Datasheet - Page 17

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cyv15g0204rb

Manufacturer Part Number
cyv15g0204rb
Description
Independent Clock Dual Hotlink Ii Reclocking Deserializer
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Document #: 38-02103 Rev. *B
CYV15G0204RB DC Electrical Characteristics
AC Test Loads and Waveforms
CYV15G0204RB AC Electrical Characteristics
CYV15G0204RB Receiver LVTTL Switching Characteristics Over the Operating Range
f
t
t
Notes:
10. Maximum I
11. Typical I
12. Cypress uses constant current (ATE) load configurations and forcing functions. This figure is for reference only.
13. The LVTTL switching threshold is 1.4V. All timing references are made relative to where the signal edges cross the threshold voltage.
V
V
V
V
V
I
I
VI
I
I
RS
RXCLKP
RXCLKD
9.
Parameter
IHE
ILE
CC
CC
Differential Serial Line Receiver Inputs: INA1±, INA2±, INB1±, INB2±
Power Supply
OLC
ODIF
DIFFs
IHE
ILE
COM
Parameter
GND
[10, 11]
[10, 11]
The common mode range defines the allowable range of INPUT+ and INPUT− when INPUT+ = INPUT−. This marks the zero-crossing between the true and
complement inputs as the signal switches between a logic-1 and a logic-0.
outputs unloaded.
sending a continuous alternating 01 pattern. The redundant outputs on each channel are powered down and the parallel outputs are unloaded.
V
[7]
[9]
th
≤ 1 ns
= 1.4V
CC
CC
is measured under similar conditions except with V
R1 = 590Ω
R2 = 435Ω
C
(Includes fixture and
probe capacitance)
Output LOW Voltage
(V
Output Differential Voltage
|(OUT+) − (OUT−)|
Input Differential Voltage |(IN+) − (IN−)|
Highest Input HIGH Voltage
Lowest Input LOW Voltage
Input HIGH Current
Input LOW Current
Common Mode input range
Max Power Supply Current
Typical Power Supply Current
L
is measured with V
(c) LVTTL Input Test Waveform
≤ 7 pF
(a) LVTTL Output Test Load
CC
RXCLKx± Clock Output Frequency
RXCLKx± Period = 1/f
RXCLKx± Duty Cycle Centered at 50% (Full Rate and Half Rate)
Referenced)
2.0V
0.8V
CC
Description
3.0V
C
= MAX, T
L
2.0V
0.8V
3.3V
A
RS
= 25°C, with both channels and Serial Line Drivers enabled, sending a continuous alternating 01 pattern, and
R1
R2
[12]
Description
V
[13]
th
≤ 1 ns
CC
= 1.4V
= 3.3V, T
100Ω differential load
150Ω differential load
100Ω differential load
150Ω differential load
V
V
((V
(V
TRGCLKx
= MAX
TRGCLKx
= 125 MHz
(continued)
A
IN
IN
= 25°C, with both channels enabled and one Serial Line Driver per transmit channel
CC
CC
= V
= V
– 0.5V) max.
V
V
– 2.0V)+0.5)min,
Test Conditions
IHE
ILE
IHE
ILE
≤ 270 ps
Min.
Max.
Commercial
Industrial
Commercial
Industrial
20%
(d) CML/LVPECL Input Test Waveform
(Includes fixture and
probe capacitance)
(b) CML Output Test Load
R
L
= 100Ω
80%
V
V
V
V
V
IHE
ILE
CC
CC
CC
+1.25
–700
Min.
Typ.
Min.
9.75
6.66
–1.0
450
560
100
600
620
– 1.4
– 1.4
– 2.0
CYV15G0204RB
80%
R
L
[12]
V
V
102.56
CC
CC
Max
+1.0
Max.
1000
1200
1350
Max.
1320
1320
20%
150
+3.1
V
900
720
700
≤ 270 ps
Page 17 of 24
CC
– 0.7
– 0.7
MHz
Unit
Unit
ns
ns
mV
mV
mV
mA
mA
mA
mA
µA
µA
V
V
V
V
V
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