ad8194-evalz Analog Devices, Inc., ad8194-evalz Datasheet
ad8194-evalz
Related parts for ad8194-evalz
ad8194-evalz Summary of contents
Page 1
... A/V receivers Set-top boxes GENERAL DESCRIPTION The AD8194 is a low cost quad 2:1 TMDS® switch for high speed HDMI™/DVI video applications. The AD8194 features equalized inputs, ideal for systems with long cable runs. Its primary function is to switch the high speed signals from one of two single-link (HDMI or DVI) sources to the single-link output. The AD8194 is a fully buffered switch solution with 50 Ω ...
Page 2
... AD8194 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 Typical Application........................................................................... 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 Maximum Power Dissipation ..................................................... 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 REVISION HISTORY 11/07—Revision 0: Initial Version Typical Performance Characteristics ..............................................6 Theory of Operation .........................................................................9 Introduction ...
Page 3
... The total power dissipation excludes power dissipated in the 50 Ω off-chip loads. Conditions/Comments NRZ At output At output Boost frequency = 1.125 GHz Differential Single-ended high speed channel Single-ended high speed channel Single-ended Single-ended Operating range S_SEL S_SEL Rev Page AD8194 7 − 1, Min Typ Max 2.25 − 150 1200 AVCC − ...
Page 4
... AVCC + 0.6 V MAXIMUM POWER DISSIPATION IN The maximum power that can be safely dissipated by the AD8194 is limited by the associated rise in junction tempera- ture. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package ...
Page 5
... PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. THE AD8194 LFCSP HAS AN EXPOSED PADDLE (ePAD) ON THE UNDERSIDE OF THE PACKAGE, WHICH AIDS IN HEAT DISSIPATION. THE ePAD MUST BE ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE TO MEET THERMAL SPECIFICATIONS. Table 4. Pin Function Descriptions Pin No. Mnemonic 1 IN_A2 2 IP_A2 ...
Page 6
... GENERATOR TP1 Figure 4. Test Circuit Diagram for Rx Eye Diagrams Figure 7. Rx Eye Diagram at TP3 (Cable = AWG) Figure 8. Rx Eye Diagram at TP3 (Cable = AWG) Rev Page AD8194 SERIAL DATA EVALUATION ANALYZER BOARD SMA COAX CABLE TP2 TP3 0 ...
Page 7
... DJ (p-p) RJ (rms 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 DATA RATE (Gbps) Figure 12. Jitter vs. Data Rate (p-p) RJ (rms) 0 3.0 3.2 3.4 SUPPLY VOLTAGE (V) Figure 13. Jitter vs. Supply Voltage (p-p) RJ (rms 0.5 1.0 1.5 DIFFERENTIAL INPUT SWING (V) Figure 14. Jitter vs. Differential Input Swing AD8194 7 − 1, 1080p 12-BIT 2.0 2.2 2.4 3 ...
Page 8
... AD8194 T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, AVEE = 0 V, differential input swing = 1000 mV, pattern = PRBS 2 A data rate = 2.25 Gbps, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, unless otherwise noted 2.5 2.7 2.9 3.1 INPUT COMMON-MODE VOLTAGE (V) Figure 15. Jitter vs. Input Common-Mode Voltage 60 58 ...
Page 9
... AD8194 because cable performance varies widely between manufacturers; however, in general, the equalization of the AD8194 does not degrade the system signal integrity, even for short input cables. For a 24 AWG reference cable, the AD8194 can equalize more than data rates up to 2.25 Gbps. VTTI IP_xx ...
Page 10
... S_SEL is pulled down to logic low. Logic levels for this pin are set in accordance with the specifications listed in Table 5. The AD8194 can be used as a single-link TMDS buffer by setting S_SEL to one fixed logic value. S_SEL also controls the switch status of the input termination resistors ...
Page 11
... PCB layout. Regardless of the data being carried on a specific TMDS channel, or whether the TMDS line is at the input or the output of the AD8194, all four high speed signals should be routed on a PCB in accordance with the same RF layout guidelines. ...
Page 12
... For example, interlayer vias can be used to route the AD8194 TMDS outputs on multiple layers of the PCB without severely degrading the quality of the output signal typical application, the AD8194 output is connected to an HDMI/DVI receiver or to another device with a 50 Ω ...
Page 13
... The two signals on the DDC bus are SDA and SCL (serial data and serial clock, respectively). The AD8194, which is a low cost part, does not have any addi- tional capability to switch these signals; other means are required to switch these signals if required ...
Page 14
... AD8194 Evaluation Board The AD8194 evaluation board illustrates one way to implement a 2:1 HDMI link switch with an AD8194 and a CMOS switch. The AD8194 evaluation board deviates from a typical application in that it uses an HDMI connector for the output as well as for the inputs. This setup makes it easy to connect ...
Page 15
... The low speed switching is performed by an MC74LVX4053. This part contributes a maximum on resistance of 108 Ω and a maximum capacitive load of 10 pF. The same select signal (S_SEL) controls both the AD8194 and the MC74LVX4053. Figure 26. Layout of TMDS Traces Rev Page AD8194 ...
Page 16
... ORDERING GUIDE Temperature Model Range 1 AD8194ACPZ −40°C to +85°C 1 AD8194ACPZ-R7 −40°C to +85°C 1 AD8194-EVALZ RoHS Compliant Part. ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07004-0-11/07(0) 5.00 BSC SQ 0.60 MAX 24 0.50 TOP BSC 4 ...