cat93c56vi-1.8-gt3 Catalyst Semiconductor, cat93c56vi-1.8-gt3 Datasheet

no-image

cat93c56vi-1.8-gt3

Manufacturer Part Number
cat93c56vi-1.8-gt3
Description
2-kb Microwire Serial Cmos Eeprom
Manufacturer
Catalyst Semiconductor
Datasheet
2-Kb Microwire Serial CMOS EEPROM
FEATURES
PIN CONFIGURATION
* TDFN 3x3mm (ZD4) and SOIC (W) rotated pin-out packages are
PIN FUNCTION
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Pin Name
CS
SK
DI
DO
V
GND
ORG
NC
available for CAT93C57 and CAT93C56, Rev. E only (not
recommended for new designs of CAT93C56)
CC
High speed operation: 2MHz
1.8V to 5.5V supply voltage range
Selectable x8 or x16 memory organization
Sequential read
Software write protection
Power-up inadvertant write protection
Low power CMOS technology
1,000,000 Program/erase cycles
100 year data retention
Industrial and Extended temperature ranges
RoHS-compliant 8-pin PDIP, SOIC, TSSOP and
8-pad TDFN packages
DO
CS
SK
DI
TDFN (VP2, ZD4*)
SOIC (V, X)
TSSOP (Y)
1
2
3
4
PDIP (L)
8 V
7 NC
6 ORG
5 GND
CC
Function
Chip Select
Clock Input
Serial Data Input
Serial Data Output
Power Supply
Ground
Memory Organization
No Connection
V
NC
CS
SK
CC
SOIC (W*)
1
2
3
4
8 ORG
7 GND
6 DO
5 DI
1
Note: When the ORG pin is connected to VCC, the x16 organization
is selected. When it is connected to ground, the x8 pin is selected. If
the ORG pin is left unconnected, then am internal pullup device will
select the x16 organization
DESCRIPTION
The CAT93C56/57 is a 2-Kb CMOS Serial EEPROM
device which is organized as either 128 registers of 16
bits (ORG pin at V
at GND). Each register can be written (or read) serially
by using the DI (or DO) pin. The CAT93C56/57 features
sequential read and self-timed internal write with auto-
clear. On-chip Power-On Reset circuitry protects the
internal logic against powering up in the wrong state.
FUNCTIONAL SYMBOL
For Ordering Information details, see page 16.
ORG
CS
SK
DI
CAT93C56, CAT93C57
CC
) or 256 registers of 8 bits (ORG pin
CAT93C56
CAT93C57
GND
V
CC
Doc. No. MD-1088 Rev. Q
DO

Related parts for cat93c56vi-1.8-gt3

cat93c56vi-1.8-gt3 Summary of contents

Page 1

... GND Ground ORG Memory Organization NC No Connection © Catalyst Semiconductor, Inc. Characteristics subject to change without notice DESCRIPTION The CAT93C56/ 2-Kb CMOS Serial EEPROM device which is organized as either 128 registers of 16 bits (ORG pin GND). Each register can be written (or read) serially by using the DI (or DO) pin ...

Page 2

... Years Min Max 1 500 -0 0.4 2 0.5V. During transitions, the voltage on any pin may © Catalyst Semiconductor, Inc. Characteristics subject to change without notice Units mA µA µA µA µA µ ...

Page 3

... OUT (1) C Input Capacitance (CS, SK, DI, ORG) IN Notes: (1) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100 and JEDEC test methods. © Catalyst Semiconductor, Inc. Characteristics subject to change without notice Test Conditions f = 1MHz 5. ...

Page 4

... V = 4.5V - 5.5V Units CC Max Min Max 100 ns 100 ns 0.5 0.25 µs 0.5 0.25 µs 200 100 0.25 µs 0.25 µs 0.25 µs 0.5 0.25 µs 500 DC 1000 kHz © Catalyst Semiconductor, Inc. Characteristics subject to change without notice ...

Page 5

... DI pin on the rising edge of the clock (SK). The DO pin is normally in a high impedance state Figure 1. Sychronous Data Timing SK VALID DI t CSS CS DO © Catalyst Semiconductor, Inc. Characteristics subject to change without notice Max stable until the specified operation can be initiated 4.5V ≤ V ≤ ...

Page 6

... Data Comments x8 x16 Read Address AN–A0 Clear Address AN–A0 D7-D0 D15-D0 Write Address AN–A0 D7-D0 D15-D0 Write Enable Write Disable Clear All Addresses D7-D0 D15-D0 Write All Addresses D7-D0 D15-D0 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice ...

Page 7

... ENABLE = 11 DISABLE = 00 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice address space, then loops back to address 0. In the sequential READ mode, only the initial data word is preceeded by a dummy zero bit. All subsequent data words will follow without a dummy zero bit. The READ instruction timing is illustrated in Figure 2 ...

Page 8

... HIGH N-1 HIGH-Z 8 (Figure 5). The falling edge of CS will CSMIN t CSMIN STANDBY STATUS VERIFY BUSY READY HIGH STANDBY STATUS VERIFY BUSY READY HIGH © Catalyst Semiconductor, Inc. Characteristics subject to change without notice ...

Page 9

... © Catalyst Semiconductor, Inc. Characteristics subject to change without notice Write All Upon receiving a WRAL command and data, the CS (Chip Select) pin must be deselected for a minimum of t (Figure 7). The falling edge of CS will start the CSMIN self clocking data write to all memory locations in the device ...

Page 10

... Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC standard MS-001. Doc. No. MD-1088 Rev. Q SYMBOL MIN NOM MAX 5.33 0.38 2.92 3.30 4.95 0.36 0.46 0.56 1.14 1.52 1.78 0.20 0.25 0.36 9.02 9.27 10.16 7.62 7.87 8.25 2.54 BSC 6.10 6.35 7.11 7.87 10.92 2.92 3.30 3. END VIEW © Catalyst Semiconductor, Inc. Characteristics subject to change without notice ...

Page 11

... D e SIDE VIEW For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: 1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC standard MS-012. © Catalyst Semiconductor, Inc. Characteristics subject to change without notice SYMBOL θ ...

Page 12

... Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with EIAJ EDR-7320 Doc. No. MD-1088 Rev. Q SYMBOL θ A θ MIN NOM MAX 2.03 0.05 0.25 0.36 0.48 0.19 0.25 5.13 5.33 7.75 8.26 5.13 5.38 1.27 BSC 0.51 0.76 0º 8º c END VIEW © Catalyst Semiconductor, Inc. Characteristics subject to change without notice ...

Page 13

... TOP VIEW SIDE VIEW For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. © Catalyst Semiconductor, Inc. Characteristics subject to change without notice SYMBOL MIN A A1 0.05 A2 0.80 b ...

Page 14

... For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC standard MO-229. Doc. No. MD-1088 Rev SIDE VIEW MAX 0.80 0.05 0.65 0.30 2.10 1.50 3.10 1.40 0. PIN#1 IDENTIFICATION D2 L BOTTOM VIEW A2 A3 FRONT VIEW © Catalyst Semiconductor, Inc. Characteristics subject to change without notice ...

Page 15

... E 2.90 3.00 E2 1.40 — e 0.65 TYP L 0.20 0.30 For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MO-229. © Catalyst Semiconductor, Inc. Characteristics subject to change without notice SIDE VIEW MAX A 0.80 0.05 A1 0.37 3.10 2.50 3.10 1.80 ...

Page 16

... All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard finish is NiPdAu. (3) The device used in the above example is a CAT93C56VI-1.8-GT3 (SOIC green package, Industrial Temperature, 1.8 Volt to 5.5 Volt Operating Voltage, NiPdAu finish, Tape & Reel.) (4) Product die revision letter is marked on top of the package as a suffix to the production date code (e.g., AYWWE). For additional informa- tion, please contact your Catalyst sales office ...

Page 17

... Rearrange / Format Text and Figures Update Package Outline Drawings Added Example of Ordering Information for CAT93C56 Die Rev. G Add MD- to document number Add Extended Temperature Range 04/10/08 Q Update Package Outline Drawings © Catalyst Semiconductor, Inc. Characteristics subject to change without notice CAT93C56, CAT93C57 Range) CC Range ...

Page 18

... Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur. ...

Related keywords