w83627hf-pw Winbond Electronics Corp America, w83627hf-pw Datasheet - Page 112
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w83627hf-pw
Manufacturer Part Number
w83627hf-pw
Description
W83627hf/f W83627hg/g Winbond Lpc I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83627HF-PW.pdf
(131 pages)
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CRF7 ( Default 0x00 ) , continued
CRF9 (Default 0x00)
CRFE, FF (Default 0x00)
9.13
CR30 (Default 0x00)
CR60, CR 61 (Default 0x00, 0x00)
These two registers select Hardware Monitor base address [0x100:0xFFF] on 8-byte boundary.
Reserved for Winbond test.
7 - 3
7 - 1
BIT
BIT
BIT
1
0
2
1
0
0
Logical Device B (Hardware Monitor)
IRQIN1EN.
IRQIN0EN.
0: Disable the generation of an SMI /
1: Enable the generation of an SMI /
0: Disable the generation of an SMI /
1: Enable the generation of an SMI /
SMIPME_OE: This is the SMI and
0: Neither SMI nor
1: An SMI or
Reserved. Return zero when read.
PME_EN: Select the power management events to be either an
rupt for the IRQ events. Note that: this bit is valid only when SMIPME_OE = 1.
0: The power management events will generate an SMI event
1: The power management events will generate an
Reserved.
Reserved.
Logic device activation control
1: Active
0: Inactived
PME
PME
event will be generated.
will be generated. Only the IRQ status bit is set.
- 108 -
DESCRIPTION
DESCRIPTION
DESCRIPTION
PME
PME
PME
PME
PME
output enable bit.
interrupt due to IRQIN1's IRQ.
interrupt due to IRQIN0's IRQ.
interrupt due to IRQIN1's IRQ.
interrupt due to IRQIN0's IRQ.
W83627HF/ F/ HG/ G
PME
event.
PME
or SMI inter-
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