tp11368 National Semiconductor Corporation, tp11368 Datasheet - Page 10

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tp11368

Manufacturer Part Number
tp11368
Description
Octal Adaptive Differential Pcm Processor
Manufacturer
National Semiconductor Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
tp11368V/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
www.national.com
I
I
P
V
V
V
V
V
V
I
I
I
C
C
C
f
t
t
t
t
t
Symbol
CC0
CC1
IL
IH
OZ
CLK
CLK
r
f
CEP
CEL
DC Electrical Characteristics
Unless otherwise noted, limits printed in bold characters are guaranteed forV
−40˚C to +85˚C by correlation with 100% electrical testing at T
production tests and/or product design and characterization. Typical values are specified at V
Note 4: Test inputs have internal pull-down resistor.
Timing Specifications
Unless otherwise noted, limits printed in bold characters are guaranteed for V
−40˚C to +85˚C by correlation with 100% electrical testing at T
production tests and/or product design and characterization. Typical values are specified at V
Absolute Maximum Ratings
TGT: FNXref NS0466*)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
Voltage at Any Digital
D
IL
IH
IL
IH
OL
OH
I
O
L
Symbol
CC
Inputs or Outputs
to GND
Supply Current
(Power Down Mode)
Supply Current
(Power Up Mode)
Power Dissipation
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Low Current
Input High Current
Output Current in High
Impedance State
Input Capacitance
Output Capacitance
Capacitive Load
CLK Frequency (Note 5)
CLK Duty-Cycle
Rise Time (CLK, CE,
ASCK, PSCK)
Fall Time (CLK, CE,
ASCK, PSCK)
CE Period
CE Pulse Width, Low
Parameter
Parameter
GND − 0.3V to V
CLK = 16.0 MHz, RSTB = Low
CLK = 16.0 MHz, RSTB = High
For ASCK, PSCK, CE, TRB,
CLK, RSTB
For PCM1, RSI, TSI, QSEL0,
QSEL1, INIT, EN
I
I
I
GND
V
Test Inputs TST0, TST1, TST2 (Note 4)
GND
L
L
L
IH
= 4 mA
= −4 mA
= −0.4 mA; V
<
<
<
(Note *NO
V
Assuming 50% Duty Cycle
Encode or Decode
Initialization
Disable
IN
V
V
CC
IN
O
<
<
<
+ 0.3V
V
V
CC
V
Conditions
CC
CC
IL
7V
, All Signal Inputs
, All Signal Inputs
, TSO and RS0
= 4.75V
Conditions
10
A
A
= 25˚C. All other limits are assured by correlation with other
= 25˚C. All other limits are assured by correlation with other
Storage Temperature Range
Lead Temperature
Latch-up Immunity on any Pin
JA
JA
(Soldering, 10 sec)
(28-pin PLCC)
(24-pin DIP)
CC
CC
= 5.0V
= 5.0V
±
V
±
15.8
40%
CC
Min
123
45
5%, GND1 = GND2 = 0V, T
9
4
Min
−10
−10
5%, GND1 = GND2 = 0V, T
2.4
2.0
2.4
− 0.8
CC
CC
= +5V, T
= +5V, T
50%
Typ
16
Typ
10
50
A
A
= 25˚C.
= 25˚C.
Max
60%
18
10
10
−45˚C to +125˚C
Max
150
100
1.8
0.8
0.7
0.4
12
10
10
10
10
A
±
79˚C/W
49˚C/W
A
Cycles
Cycles
Period
Units
75 mA
=
MHz
CLK
CLK
CLK
300˚C
Units
=
ns
ns
mW
mA
mA
µA
µA
µA
µA
pF
pF
pF
V
V
V
V
V
V
V

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