ada4922-1 Analog Devices, Inc., ada4922-1 Datasheet - Page 5

• Manufacturer Part Number: ada4922-1
• Description: High Voltage, Differential 18-bit Adc Driver
• Manufacturer: Analog Devices, Inc.

ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature Range (Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
specified for a device soldered in the circuit board with its
exposed paddle soldered to a pad on the PCB surface that is
thermally connected to a copper plane, with zero airflow.
Table 4. Thermal Resistance
Package Type
8-Lead SOIC with EP on 4-layer board
8-Lead LFCSP with EP on 4-layer board
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4922-1
package is limited by the associated rise in junction temperature
(T
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4922-1. Exceeding a
junction temperature of 150°C for an extended period can
result in changes in the silicon devices potentially causing
failure.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
JA
J
) on the die. At approximately 150°C, which is the glass
is specified for the worst-case conditions, that is, θ
θ
79
81
JA
Rating
26 V
See Figure 3
–65°C to +125°C
–40°C to +85°C
300°C
150°C
θ
25
17
JC
JA
is
Unit
°C/W
°C/W
Rev. 0 | Page 5 of 20
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
drive depends upon the particular application. For each output,
the power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to all of the loads is equal to the sum of
the power dissipation due to each individual load. RMS voltages
and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ
package must be soldered to a pad on the PCB surface that is
thermally connected to a copper plane to achieve the specified θ
Figure 3 shows the maximum safe power dissipation in the
packages vs. the ambient temperature for the 8-lead SOIC
(79°C/W) and for the 8-lead LFCSP (81°C/W) on a JEDEC
standard 4-layer board, each with its underside paddle soldered
to a pad that is thermally connected to a PCB plane. θ
are approximations.
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
3.0
2.5
2.0
1.5
1.0
0.5
0
–40
JA
. The exposed paddle on the underside of the
–20
S
LFCSP
). The power dissipated due to the load
SOIC
AMBIENT TEMPERATURE (°C)
0
20
D
) is the sum of the
40
ADA4922-1
S
60
) times the
JA
80
values
JA
. In
JA
.