adl5317 Analog Devices, Inc., adl5317 Datasheet - Page 13

• Manufacturer Part Number: adl5317
• Description: Avalanche Photodiode Bias Controller And Wide Range 5 Na To 5 Ma Current Monitor
• Manufacturer: Analog Devices, Inc.

The setup in Figure 26 is used to measure the output current
noise of the ADL5317. Batteries are used in numerous places to
minimize introduced noise and remove the uncertainty
resulting from the use of multiple dc supplies. In application,
properly bypassed dc supplies provide similar results. The load
resistor is chosen for each current to maximize signal-to-noise
ratio while maintaining measurement system bandwidth (when
combined with the low capacitance JFET buffer). The custom
LNA is used to overcome noise floor limitations in the
HP89410A signal analyzer.
Figure 27 shows the configuration used to measure the I
pulse response. To create the test current pulse, Q1 is used in a
common base configuration with the Agilent 33250A, generating a
negative biased square wave with an amplitude that results in a
one decade current step on IPDM.
R
one cable is used between the Agilent 33250A and R
everything else is connected with SMA connectors. A FET
scope probe connects the output of the
TDS5104 input.
DC POWER SUPPLY
C
AGILENT
33250A
is chosen according to what current range is desired. Only
ALKALINE
DP 8200
D CELLS
Q1
R
Figure 27. Configuration for Pulse Response from I
C
Figure 26. Configuration for Noise Spectral Density and
ALKALINE
+
–
+
–
+
–
+
–
VAPD
D CELLS
FALT VPHV VPLV VSET VCLH
20kΩ
EVALUATION BOARD
DC SUPPLIES/DMM
+
–
+
–
+
–
ADL5317
Wideband Current Noise
33μF
ALKALINE
D CELL
VAPD
VPHV
ADL5317
GE 273
R1
+
–
VPLV VSET
R
604Ω
IPDM
L
1kΩ
IPDM
FET BUFFER
+9V
AD8067
+
–
+9V
83nF
–
+
1pF
AD8067
R
C
to the
APD
VECTOR SIGNAL
ANALYZER
to I
C,
+12V
–12V
HP89410A
while
TDS5104
PDM
LNA
APD
Rev. 0 | Page 13 of 16
The configuration in Figure 28 is used to measure V
V
current on the VAPD pin. An Agilent 33250A pulse generator is
used on the VSET pin to create a 1.6 V to 2.4 V square wave.
The capacitance on the GARD pin is 2 nF for this test.
The setup in Figure 29 is used to measure the frequency
response from I
delivers a −1.250 V dc offset to bias the NPN transistor and to
have a 500 mV drop across R
depth of 5% of full scale over frequency. The voltage across R
sets the dc operating point of I
in decade changes in I
is fed into an
transimpedance amplifier. The Feedback Resistor, R
same value as that on the output of the AD8138. Note that any
noise at the VSET input is amplified by the ADL5317 with a
gain of 30. This noise shows up on VAPD and causes errors
when measuring nanoamp current levels. This noise can be
filtered by use of the GARD pin. See the GARD Interface
section for more details.
SPLITTER
OUTPUT
POWER
NETWORK ANALYZER
SET
is pulsed. Q1 and R
+
–
Figure 28. Configuration for Pulse Response from V
EVAL BOARD
TDS5104
AD8138
R
Figure 29. Configuration for Small Signal AC Response
Q1
R
C
A
AD8045
APD
B
VAPD
+
–
FALT VPHV VPLV IPDM VCLH
to I
R
F
50Ω
APD
op amp configured to operate as a
PDM
EVALUATION BOARD
VAPD
DC SUPPLIES/DMM
VSET
C
1V
. The output current at the IPDM pin
are used to generate the operating
. The
ADL5317
VPHV
F
. This voltage is modulated to a
APD
AD8138
EVAL BOARD
60V
ADL5317
. R
F
values are chosen to result
COMM
5V
differential op amp
VSET
VPLV
IPDM
SET
ADL5317
AGILENT
33250A
to V
R
F
AD8045
APD
, is the
F
APD
while
F