adl5391acpz-wp Analog Devices, Inc., adl5391acpz-wp Datasheet - Page 4
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adl5391acpz-wp
Manufacturer Part Number
adl5391acpz-wp
Description
Dc To 2.0 Ghz Multiplier
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADL5391ACPZ-WP.pdf
(16 pages)
ADL5391
Parameter
GAIN TRIMMING (α)
REFERENCE VOLTAGE
POWER AND ENABLE
OIP3
OIP2
Output 1 dB Compression Point
Group Delay
Differential Gain Error, X/Y
Differential Phase Error, X/Y
Nominal Bias
Input Range
Gain Adjust Range
Source Current
Supply Voltage Range
Total Supply Current
Disable Current
Disable Threshold
Enable Response Time
Disable Response Time
Conditions
Two-tone IP3 test; X (Y) = 100 mV p-p/tone
(−10 dBm into 50 Ω), Y (X) = 1
f1= 49 MHz, f = 50 MHz
f1 = 999 MHz, f2 = 1 GHz
f1 = 49 MHz, f = 50 MHz
f1 = 999 MHz, f2 = 1 GHz
X (Y) to W, Y (X) = 1 V, 50 MHz
1 GHz
200 MHz
1 GHz
f = 3.58 MHz
f = 3.58 MHz
GADJ
Unconnected
Input 0 V to 2 V
VMID
Common-mode for X, Y, Z = 2.5 V
V
Common-mode for X, Y, Z = 2.5 V
ENBL = 0 V
High to Low
Delay following high-to-low transition until device
meets full specifications
Delay following low-to-high transition until device
produces full attenuation
POS
, COMM, ENBL
Rev. 0 | Page 4 of 16
Min
0
4.5
Typ
26.5
14
45.5
28
15.1
13.2
0.5
0.7
2.7
0.23
1.12
9.5
V
135
7.5
1.5
150
50
POS
/2
Max
2
50
5.5
Degrees
Unit
dBm
dBm
dBm
dBm
dBm
dBm
ns
ns
%
V
V
dB
V
mA
V
mA
mA
V
ns
ns