el5283 Intersil Corporation, el5283 Datasheet
el5283
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el5283 Summary of contents
Page 1
... The rail-to-rail output swing enables direct connection of the comparator to both CMOS and TTL logic circuits. The latch input of the EL5283 can be used to hold the comparator output value by applying a low logic level to the pin. The EL5283 is a window comparator. A single input is compared with a high reference and a low ...
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... D t Minimum Setup Time S t Minimum Hold Time H t (D) Minimum Latch Disable Pulse Width PW 2 EL5283 = 25° C) Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +15 0°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C -) -0.2V] to [(V +) +0.2V] Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 125° -0.2V] to [(V +) +0.2V] Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves ...
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... OUT ±V Offset Voltage vs Temperature 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 -50 -30 -10 10 Temperature (°C) 3 EL5283 Negative Supply Current vs Temperature (per comparator) -4.5 -4.6 -4.7 -4.8 -4.9 -5 -5.1 -5.2 -5 -50 Input Bias Current vs Temperature -50 (V) S Propagation Delay vs Overdrive ...
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... Propagation Delay vs Source Resistance V =1V Step =± = =2.2k =1V Step IN V =50mV 0.2 0.4 0.6 Source Resistance (k:) 4 EL5283 (Continued) Propagation Delay vs Supply Voltage V IN 10 8 6 100 120 4 (pF) Propagation Delay vs Overdrive 10 9 ...
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... JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board 0.6 486mW 0.5 0.4 0.3 0.2 0 Ambient Temperature (°C) Output with 30MHz Input V = EL5283 (Continued) Digital Supply Current vs Input Switching Frequency 30 VS=±5V V =± = =50mV =25° ...
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... Minimum Hold Time - The minimum time after the negative transition of the latch signal that an input signal must remain unchanged H in order to be acquired and held at the output t (D) Minimum Latch Disable Pulse Width - The minimum time that the latch signal must remain high in order to acquire and hold an PW input signal change 6 EL5283 Compare Compare Latch ...
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... Circuit 1) (Reference Circuit 2) plane construction techniques enhance stability of the comparators. Input Voltage Considerations The EL5283 input range is specified from 0.1V below V -. The output S 2.25V below V output still responds correctly to a small differential input signal. The differential input stage is a pair of PNP transistors, therefore, the input bias current flows out of the device ...
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... Latch Pin Dynamics The EL5283 contains a “transparent” latch for each channel. The latch pin is designed to be driven with either a TTL or CMOS output. When the latch is connected to a logic high level or left floating, the comparator is transparent and immediately responds to the changes at the input terminals ...