clc405 National Semiconductor Corporation, clc405 Datasheet - Page 4

• Manufacturer Part Number: clc405
• Description: Low-cost, Low-power, 110mhz Op Amp With Disable
• Manufacturer: National Semiconductor Corporation

Feedback Resistor
The feedback resistor, R
frequency response for a current feedback amplifier.
Unless otherwise stated, the performance plots and data
sheet specify CLC405 operation with R
gain of +2V/V. Optimize frequency response for different
gains by changing R
response and extend bandwidth. Increase R
of the frequency response and decrease bandwidth. Use
a 2k
Use application note OA-13 to optimize your R
tion. The equations in this note are a good starting
point for selecting R
impedance for OA-13 is approximately 182 .
Enable/Disable Operation Using ± 5V Supplies
The CLC405 has a TTL & CMOS logic compatible
disable function. Apply a logic low (i.e. < 0.8V) to pin
8, and the CLC405 is guaranteed disabled across its
temperature range. Apply a logic high to pin 8, (i.e. >
2.0V) and the CLC405 is guaranteed enabled. Voltage,
not current, at pin 8 determines the enable/disable
state of the CLC405.
Disable the CLC405 and its inputs and output become
high impedances. While disabled, the CLC405’s
quiescent power drops to 8mW.
Use the CLC405’s disable to create analog switches or
multiplexers. Implement a single analog switch with one
CLC405 positioned between an input and output.
Create an analog multiplexer with several CLC405s.
Tie the outputs together and put a different signal on
each CLC405 input.
http://www.national.com
CLC405 Typical Performance Characteristics
-0.10
-0.20
0.20
0.00
0.10
-0.1
-0.2
0.2
0.1
0.0
Small Signal Pulse Response
Short Term Settling Time
0
R
f
for unity gain, voltage follower circuits.
20
Time (5ns/div)
40
Time (ns)
A
A
V
V
+1
-1
f
f
. Decrease R
. The value for the inverting input
60
V
out
f
, determines the loop gain and
= 2Vstep
80
100
f
to peak frequency
-1.0
-2.0
2.0
1.0
0.0
f
CLC405 OPERATION
60
50
40
20
10
30
of 348
10k
Large Signal Pulse Response
PSRR and CMRR
CMRR
PSRR
f
to roll off
f
100k
selec-
at a
Frequency (Hz)
Time (5ns/div)
A
A
V
V
+2
-2
1M
4
Operate the CLC405 without connecting pin 8. An
internal 20k
is enabled when pin 8 is floating.
Enable/Disable Operation for Single or
Unbalanced Supply Operation
Figure 1 illustrates the internal enable/disable opera-
tion of the CLC405. When pin 8 is left floating or is tied
to +V
CLC405 bias circuitry.
0.8V above the supply midpoint, Q1 stops tail current
from flowing in the CLC405 circuitry. The CLC405 is
now disabled.
Disable Limitations
The feedback resistor, R
gain configurations. Do not apply voltages greater than
+V
(A
cc
V
10M
= +2, R
or less than -V
CLC405
cc
Mid-Point
Supply
, Q1 is on and pulls tail current through the
V
cc
100M
f
2
-V
= 348 : V
ee
pull-up resistor guarantees the CLC405
20k
20k
-1.0
4.0
3.0
2.0
1.0
50
40
30
20
10
0
0
ee
cc
-60
Settling Time vs. Capacitive Load
10
I
BI
= + 5V, R
to pin 8 or any other pin.
, I
Figure 1
Q
348
CLC405
+
BN
NOTE: Pins 4, 7, 8 are external
-
f
2
, limits off isolation in inverting
348
, V
-20
When pin 8 is less than
Circuitry
IO
I
BI
Bias
Q
vs. Temperature
I Tail
Temperature (
R
V
L
1
s
C
o
V
= 2V step
L
IO
= 100 unless specified)
20
CL (pF)
100
1k
R
s
60
20k
I
BN
o
T
C)
s
100
Pull-up
Resistor
Disable
Pin 7
Pin 4
+V
Pin 8
-V
ee
cc
1000
140
100
80
60
40
20
0
1.0
0
-1.0
-2.0
-3.0
-4.0