adcmp563 Analog Devices, Inc., adcmp563 Datasheet

adcmp563

Manufacturer Part Number

adcmp563

Description

Dual High Speed Ecl Comparators

Manufacturer

Analog Devices, Inc.

Datasheet

1.ADCMP563.pdf (16 pages)

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FEATURES

Differential ECL-compatible outputs

700 ps propagation delay input to output

75 ps propagation delay dispersion

Input common-mode range: –2.0 V to +3.0 V

Robust input protection

Differential latch control

Internal latch pull-up resistors

Power supply rejection greater than 85 dB

700 ps minimum pulse width

1.5 GHz equivalent input rise time bandwidth

Typical output rise/fall time of 500 ps

ESD protection > 4kV HBM, >200V MM

Programmable hysteresis

APPLICATIONS

Automatic test equipment

High speed instrumentation

Scope and logic analyzer front ends

Window comparators

High speed line receivers

Threshold detection

Peak detection

High speed triggers

Patient diagnostics

Hand-held test instruments

Zero crossing detectors

Line receivers and signal restoration

Clock drivers

GENERAL DESCRIPTION

The ADCMP563/ADCMP564 are high speed comparators

fabricated on Analog Devices’ proprietary XFCB process. The

devices feature a 700 ps propagation delay with less than 75 ps

overdrive dispersion. Dispersion, a measure of the difference in

propagation delay under differing overdrive conditions, is a

particularly important characteristic of high speed comparators.

A separate programmable hysteresis pin is available on the

ADCMP564.

A differential input stage permits consistent propagation delay

with a wide variety of signals in the common-mode range from

−2.0 V to +3.0 V. Outputs are complementary digital signals

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

Dual, High Speed ECL Comparators

that are fully compatible with ECL 10 K and 10 KH logic

families. The outputs provide sufficient drive current to directly

drive transmission lines terminated in 50 Ω to −2 V. A latch

input, which is included, permits tracking, track-and-hold, or

sample-and-hold modes of operation. The latch input pins

contain internal pull-ups that set the latch in tracking mode

when left open.

The ADCMP563/ADCMP564 are specified over the industrial

temperature range (−40°C to +85°C).

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

–INA

+INA

Figure 2. ADCMP563 16-Lead QSOP

GND

LEA

ADCMP563

(Not to Scale)

TOP VIEW

NONINVERTING

BRQ

FUNCTIONAL BLOCK DIAGRAM

INVERTING

GND

LEA

ADCMP563/ADCMP564

Figure 4. ADCMP563 16-Lead LFCSP

LATCH ENABLE

INPUT

GND

LEB

–INB

+INB

–INA +INA +INB –INB

QA QA

ADCMP563

(Not to Scale)

PIN1

TOP VIEW

Figure 1.

BCP

ADCMP563/

ADCMP564

HYSA

HYS*

Figure 3. ADCMP564 20-Lead QSOP

GND

–INA

+INA

LEA

*ADCMP564 ONLY

LATCH ENABLE

INPUT

ADCMP564

(Not to Scale)

TOP VIEW

GND

LEB

BRQ

Q OUTPUT

www.analog.com

GND

LEB

–INB

+INB

HYSB

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