adcmp567 Analog Devices, Inc., adcmp567 Datasheet
adcmp567
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adcmp567 Summary of contents
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... V − latch input is included, which permits tracking, DD track-and-hold, or sample-and-hold modes of operation. The ADCMP567 is available in a 32-lead LFCSP package. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved. ...
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... ADCMP567 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Considerations.............................................................. 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Timing Information ......................................................................... 8 Application Information.................................................................. 9 Clock Timing Recovery ............................................................... 9 REVISION HISTORY Revision 0: Initial Version Optimizing High Speed Performance ........................................9 Comparator Propagation Delay Dispersion ..............................9 Comparator Hysteresis .............................................................. 10 Minimum Input Slew Rate Requirement ................................ 10 Typical Application Circuits ...
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... SPECIFICATIONS Table 1. ADCMP567 ELECTRICAL CHARACTERISTICS (V Parameter DC INPUT CHARACTERISTICS (See Note) Input Common-Mode Range Input Differential Voltage Input Offset Voltage Input Offset Voltage Channel Matching Offset Voltage Tempco Input Bias Current Input Bias Current Tempco Input Offset Current Input Capacitance Input Resistance, Differential Mode ...
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... ADCMP567 Parameter AC PERFORMANCE (continued) Equivalent Input Rise Time Bandwidth Toggle Rate Minimum Pulsewidth Unit to Unit Propagation Delay Skew POWER SUPPLY Positive Supply Current Negative Supply Current Logic Supply Current Logic Supply Current Positive Supply Voltage Negative Supply Voltage Logic Supply Voltage ...
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... ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. THERMAL CONSIDERATIONS Rating The ADCMP567 LFCSP 32-lead package option has a θ −0 +6.0 V (junction-to-ambient thermal resistance) of 27.2°C/W in still air. −6 +0.5 V − ...
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... Positive Supply Terminal CC GND PIN 1 –INA INDICATOR +INA ADCMP567 TOP VIEW +INB 6 (Not to Scale) EE –INB GND CONNECT 03632-0-002 Figure 2. ADCMP567 Pin Configuration Rev Page ...
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... In the latch mode (logic high), the output will reflect the input state just prior to the comparator’s being placed in the latch mode. LEA must be driven in conjunction with LEA . 32 GND Analog Ground Rev Page ADCMP567 ...
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... ADCMP567 TIMING INFORMATION LATCH ENABLE LATCH ENABLE DIFFERENTIAL INPUT VOLTAGE Q OUTPUT Q OUTPUT The timing diagram in Figure 3 shows the ADCMP567 compare and latch features. Table 4 describes the terms in the diagram. Table 4. Timing Descriptions Symbol Timing Description t Input to output Propagation delay measured from ...
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... The ADCMP567 comparators are very high speed devices. Consequently, high speed design techniques must be employed to achieve the best performance. The most critical aspect of any ADCMP567 design is the use of a low impedance ground plane. A ground plane, as part of a multilayer board, is recommended for proper high speed performance. Using a continuous con- ...
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... For the ADCMP567, overdrive dispersion is typically the overdrive is changed from 100 This specification applies for both positive and negative overdrive since the ADCMP567 has equal delays for positive and negative going inputs. The 35 ps propagation delay overdrive dispersion of the ADCMP567 offers considerable improvement of the 100 ps dispersion of other similar series comparators ...
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... ADCMP567 V – 450Ω HYSTERESIS VOLTAGE ALL RESISTORS 50Ω UNLESS OTHERWISE NOTED Figure 10. Hysteresis Using Latch Enable Input 50Ω ADCMP567 V IN 50Ω 100Ω 100Ω – 2) × Figure 11. How to Interface a PECL Output to an Instrument with a 50 Ω to Ground Input ...
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... ADCMP567 TYPICAL PERFORMANCE CHARACTERISTICS ( −5 +3 –2.5 –1.5 –0.5 0.5 NONINVERTING INPUT VOLTAGE (INVERTING VOLTAGE = 0.5V) Figure 12. Input Bias Current vs. Input Voltage 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 –40 – TEMPERATURE (°C) Figure 13. Input Offset Voltage vs. Temperature 195 185 175 165 ...
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... Figure 20. Rise and Fall of Outputs vs. Time 236 235 234 233 232 231 230 229 –2 Figure 21. Propagation Delay vs. Common-Mode Voltage 0 –5 –10 –15 –20 –25 –30 –35 –40 1.4 1.6 0.15 1.8 1.9 2.0 Rev Page ADCMP567 – INPUT COMMON-MODE VOLTAGE (V) 2.15 4.15 6.15 8.15 PULSEWIDTH (ns) Figure 22. Propagation Delay Error vs. Pulsewidth 3 ...
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... ADCMP567 OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 1.00 0.90 0.80 ORDERING GUIDE Model Temperature Range ADCMP567BCP −40°C to +85°C 5.00 BSC SQ 0.60 MAX 4.75 BSC SQ 0.50 0.40 0.30 0.80 MAX 0.65 NOM 0.05 MAX 0.02 NOM 0.30 COPLANARITY 0.20 REF 0.23 0.08 SEATING 0.18 PLANE COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2 Figure 23. 32-Lead Lead Frame Chip Scale Package [LFCSP] (CP-32) Dimensions shown in millimeters ...
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... Notes Rev Page ADCMP567 ...
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... ADCMP567 Notes © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03632–0–10/03(0) Rev Page ...
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... Filename: ADCMP567_Oct 21.doc Directory: C:\Documents and Settings\fburns\Desktop Template: C:\Documents and Settings\aakers\Desktop\Data Sheet Template v3.2.dot Title: ADCMP567 Dual Ultrafast Voltage Comparator Data Sheet (REV. 0) Subject: Author: Analog Devices, Inc. Keywords: Comments: Creation Date: 10/15/2003 1:35 PM Change Number: 15 Last Saved On: 10/21/2003 4:57 PM Last Saved By: ...