adcmp553 Analog Devices, Inc., adcmp553 Datasheet

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adcmp553

Manufacturer Part Number
adcmp553
Description
Single Supply High Speed Pecl Comparators
Manufacturer
Analog Devices, Inc.
Datasheet

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Part Number:
adcmp553BRM
Manufacturer:
BB
Quantity:
5
FEATURES
Single power supply
500 ps propagation delay input to output
125 ps overdrive dispersion
Differential PECL/LVPECL compatible outputs
Differential latch control
Internal latch pull-up resistors
Power supply rejection greater than 70 dB
700 ps minimum pulse width
Equivalent input rise time bandwidth > 750 MHz
Typical output rise/fall of 500 ps
Programmable hysteresis
APPLICATIONS
Automatic test equipment
High speed instrumentation
Scope and logic analyzer front ends
Window comparators
High speed line receivers
Threshold detection
Peak detection
High speed triggers
Patient diagnostics
Disk drive read channel detection
Hand-held test instruments
Zero-crossing detectors
Line receivers and signal restoration
Clock drivers
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
ADCMP551/ADCMP552/ADCMP553
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The ADCMP551/ADCMP552/ADCMP553 are single-supply,
high speed comparators fabricated on Analog Devices’
proprietary XFCB process. The devices feature a 500 ps
propagation delay with less than 125 ps overdrive dispersion.
Overdrive dispersion, a measure of the difference in
propagation delay under differing overdrive conditions, is a
particularly important characteristic of high speed comparators.
A separate programmable hysteresis pin is available on the
ADCMP552.
A differential input stage permits consistent propagation delay
with a common-mode range from –0.2 V to VCCI – 2.0 V.
Outputs are complementary digital signals and are fully
compatible with PECL and 3.3V LVPECL logic families. The
outputs provide sufficient drive current to directly drive
transmission lines terminated in 50 Ω to VCCO − 2 V. A latch
input is included and permits tracking, track-and-hold, or
sample-and-hold modes of operation. The latch input pins
contain internal pull-ups that set the latch in tracking mode
when left open.
The ADCMP551/ADCMP552/ADCMP553 are specified over
the –40°C to +85°C industrial temperature range. The
ADCMP551 is available in a 16-lead QSOP package; the
ADCMP552 is available in a 20-lead QSOP package; and the
ADCMP553 is available in an 8-lead MSOP package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
PECL/LVPECL Comparators
NONINVERTING
Single-Supply, High Speed
INVERTING
LATCH ENABLE
INPUT
INPUT
INPUT
© 2004 Analog Devices, Inc. All rights reserved.
*ADCMP552 ONLY
Figure 1.
ADCMP551/
ADCMP552/
ADCMP553
HYS*
LATCH ENABLE
INPUT
Q OUTPUT
Q OUTPUT
www.analog.com

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adcmp553 Summary of contents

Page 1

... The ADCMP551 is available in a 16-lead QSOP package; the ADCMP552 is available in a 20-lead QSOP package; and the ADCMP553 is available in an 8-lead MSOP package. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © ...

Page 2

... ADCMP551/ADCMP552/ADCMP553 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Considerations.............................................................. 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 8 Timing Information ....................................................................... 10 Application Information................................................................ 11 REVISION HISTORY 10/04—Revision 0: Initial Version Clock Timing Recovery............................................................. 11 Optimizing High Speed Performance ..................................... 11 Comparator Propagation Delay Dispersion ........................... 11 Comparator Hysteresis .............................................................. 12 Minimum Input Slew Rate Requirement ...

Page 3

... Latch to Output Delay Latch Minimum Pulse Width DC OUTPUT CHARACTERISTICS Output Voltage—High Level Output Voltage—Low Level AC OUTPUT CHARACTERISTICS Rise Time Fall Time AC OUTPUT CHARACTERISTICS (ADCMP553) Rise Time Fall Time AC PERFORMANCE Propagation Delay Propagation Delay Tempco Prop Delay Skew—Rising Transition to Falling Transition Within Device Propagation Delay Skew— ...

Page 4

... Output Supply Voltage Positive Supply Differential Power Dissipation Power Dissipation DC Power Supply Rejection Ratio—V CCI DC Power Supply Rejection Ratio—V CCO POWER SUPPLY (ADCMP553) Positive Supply Current Positive Supply Current Positive Supply Voltage Power Dissipation Power Dissipation DC Power Supply Rejection Ratio—V CC ...

Page 5

... The ADCMP552 20-lead QSOP package has a θ ambient thermal resistance) of 80°C/W in still air. −40°C to +85°C 125°C The ADCMP553 8-lead MSOP package has a θ −65°C to +150°C ambient thermal resistance) of 130°C/W in still air. Rev Page ...

Page 6

... Inverting Analog Input of the Differential Input Stage for Channel B. The inverting B input must be driven in conjunction with the noninverting B input. AGND Analog Ground. Rev Page AGND LEA 1 8 ADCMP553 V LEA TOP VIEW QA +INA 3 6 (Not to Scale) QA –INA 4 5 Figure 4. ADCMP553 8-Lead MSOP Pin Configuration ...

Page 7

... One of Two Complementary Outputs for Channel logic high if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input (provided the comparator is in the compare mode). See the description of Pin LEB for more information. V Positive Supply Terminal. CC Rev Page ADCMP551/ADCMP552/ADCMP553 ...

Page 8

... TEMPERATURE (°C) Figure 8. Input Bias Current vs. Temperature 2.4 2.3 RISE 2.2 2.1 2.0 1.9 1.8 1.7 FALL 1.6 1.5 1.4 0 0.25 0.50 0.75 1.00 1.25 TIME (ns) Figure 9. Rise and Fall of Outputs vs. Time 460 450 RISE 440 430 420 FALL 410 400 –40 –30 –20 – TEMPERATURE (°C) Figure 10. ADCMP553 Rise/Fall Time vs. Temperature 60 80 1.50 1. ...

Page 9

... OVERDRIVE VOLTAGE (V) Figure 12. Propagation Delay vs. Overdrive Voltage 120 100 100 10 (k Ω HYS Figure 13. Comparator Hysteresis vs. R ADCMP551/ADCMP552/ADCMP553 505 504 503 502 501 500 499 498 497 496 495 –0.2 Figure 14. Propagation Delay vs. Common-Mode Voltage 25 20 ...

Page 10

... ADCMP551/ADCMP552/ADCMP553 TIMING INFORMATION LATCH ENABLE LATCH ENABLE DIFFERENTIAL INPUT VOLTAGE Q OUTPUT Q OUTPUT Figure 17 shows the compare and latch features of the ADCMP55x family. Table 4 describes the terms in the diagram. Table 4. Timing Descriptions Symbol Timing t Input to Output High Delay PDH t Input to Output Low Delay ...

Page 11

... The overall result is a higher degree of timing accuracy since the ADCMP55x is far less sensitive to input variations than most comparator designs. Rev Page ADCMP551/ADCMP552/ADCMP553 ...

Page 12

... ADCMP551/ADCMP552/ADCMP553 Propagation delay dispersion is an important specification in critical timing applications such as ATE, bench instruments, and nuclear instrumentation. Overdrive dispersion is defined as the variation in propagation delay as the input overdrive conditions are changed (Figure 18). For the ADCMP55x, overdrive dispersion is typically 125 ps as the overdrive is changed from ...

Page 13

... CCO Figure 24. How to Interface a PECL Output to an Instrument with a OUTPUTS –2V Rev Page ADCMP551/ADCMP552/ADCMP553 V ADCMP551/ IN ADCMP552/ ADCMP553 V REF HYS 0Ω TO 80kΩ – 2.0V CCI CCO ALL RESISTORS 50Ω, UNLESS OTHERWISE NOTED Figure 23. Adding Hysteresis Using the HYS Control Pin 50Ω ...

Page 14

... COMPLIANT TO JEDEC STANDARDS MO-137AB Figure 26. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches ORDERING GUIDE Model Temperature Range ADCMP551BRQ −40°C to +85°C ADCMP552BRQ −40°C to +85°C ADCMP553BRM −40°C to +85°C EVAL-ADCMP551BRQ EVAL-ADCMP552BRQ 0.341 BSC 20 11 0.154 BSC 1 ...

Page 15

... NOTES ADCMP551/ADCMP552/ADCMP553 Rev Page ...

Page 16

... ADCMP551/ADCMP552/ADCMP553 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04722–0–10/04(0) Rev Page ...

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