el1882c Intersil Corporation, el1882c Datasheet
el1882c
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el1882c Summary of contents
Page 1
... The odd/even output indicates field polarity detected during the vertical blanking interval. The EL1882C is plug-in compatible with the industry standard LM1881 and can be substituted for that part in 5V applications with improved 50% slicing and lower required supply current ...
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... Burst/Back Porch Delay, t See Figure 2 BD Burst/Back Porch Width, t See Figure 2 B Input Dynamic Range Video Input Amplitude to Maintain 50% Slice Spec Slice Level V SLICE 2 EL1882C = 25°C) Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 125°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .400mW +0. 5V 25° ...
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... SET 3 EL1882C Composite sync pulse output; sync pulses start on a falling edge and end on a rising edge. AC coupled composite video input; sync tip must be at the lowest potential (positive picture phase). Vertical sync pulse output; the falling edge of vert sync is the start of the vertical period. ...
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... Typical Performance Curves Supply Current, Quiescent R = 681k SET V Voltage CLAMP R = 681k SET V RSET R = 681k SET 4 EL1882C 681k SET Clamp Discharge Current R = 681k SET Clamp Charge Current R = 681k SET ...
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... Typical Performance Curves Burst/Back Porch Width 5V 25°C DD Vertical Sync Width 5V 25° EL1882C (Continued Horizontal Frequency SET SET SET Burst/Back Porch Delay vs R SET 25°C DD Vertical Default Delay vs R SET 25°C ...
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... Typical Performance Curves Composite Sync Prop Delay R = 681k SET DD Vertical Sync Pulse Width R = 681k SET 6 EL1882C (Continued) Burst/Back Porch Width 681k SET Vertical Sync Default Delay Time 681k SET Composite Sync to Odd/Even Delay Time R = 681k SET Burst/Back Porch Delay Time, ...
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... Back porch goes low for a fixed pulse width on the trailing edge of video input sync pulses. Note that for serration pulses during vertical, the back porch starts on the rising edge of the serration pulse (with propagation delay). * Signal 1a drawing reproduced with permission from EIA. 7 EL1882C FIGURE 1. STANDARD (NTSC INPUT) TIMING ...
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... Expanded Timing Diagrams 8 EL1882C FIGURE 2. STANDARD VERTICAL TIMING FIGURE 3. NON-STANDARD VERTICAL TIMING ...
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... Vertical Sync is clocked out of the EL1882C on the first rising edge during the vertical serration phase. In the absence of vertical serration pulses, large ...
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... This odd/even field information is decoded by the EL1882C during the end of picture information and the beginning of vertical information. The odd/even circuit includes a T-flip- flop that is reset during full horizontal lines, but not during half lines or vertical equalization pulses ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11 EL1882C * NOTE: R MUST RESISTOR. ...