at24c04c-xhm-t ATMEL Corporation, at24c04c-xhm-t Datasheet - Page 10

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at24c04c-xhm-t

Manufacturer Part Number
at24c04c-xhm-t
Description
I 2 C-compatible 2-wire Serial Eeprom
Manufacturer
ATMEL Corporation
Datasheet
8.
10
Read Operations
Read operations are initiated in the same way as write operations with the exception that the read/write select bit in
the device address word is set to one. There are four read operations: current address read, random address read,
sequential read, and serial number read.
CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during
the last read or write operation, incremented by one. This address stays valid between operations as long as the
chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the
first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first
byte of the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM,
the current address data word is serially clocked out. The microcontroller does not respond with an input zero but
does generate a following stop condition (see
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data word address. Once
the device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another start condition. The microcontroller now initiates a current address read by
sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and
serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following
stop condition (see
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read.
After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives
an acknowledge, it will continue to increment the data word address and serially clock out sequential data words.
When the memory address limit is reached, the data word address will “roll over” and the sequential read will
continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but
does generate a following stop condition (see
Figure 8-1.
Figure 8-2.
Density
4K
8K
Atmel AT24C04C/08C [PRELIMINARY]
Device Address
Byte Write
Access Area
EEPROM
EEPROM
Figure 8-5 on page
Bit 7
MSB
1
1
11).
Figure 8-4 on page
Figure 8-6 on page
Bit 6
0
0
Bit 5
1
1
11).
11).
Bit 4
0
0
Bit 3
A
A
2
2
Bit 2
A
P
1
1
Bit 1
P
P
8787A–SEEPR–10/11
0
0
Bit 0
R/W
R/W
LSB

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