at24c04c-xhm-t ATMEL Corporation, at24c04c-xhm-t Datasheet - Page 3

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at24c04c-xhm-t

Manufacturer Part Number
at24c04c-xhm-t
Description
I 2 C-compatible 2-wire Serial Eeprom
Manufacturer
ATMEL Corporation
Datasheet
8787A–SEEPR–10/11
1.
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and
negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open-collector devices.
DEVICE/PAGE ADDRESSES (A2 and A1): The AT24C04C uses the A2 and A1 inputs for hard wire addressing
allowing a total of four 4K devices to be addressed on a single bus system. The A0 pin is a no connect and can be
connected to ground (see
hardware addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins
are no connects and can be connected to ground (see
WRITE PROTECT (WP): AT24C04C/08C has a write protect pin that provides hardware data protection. The write
protect pin allows normal read/write operations when connected to ground (GND). When the write protect pin is
connected to V
Table
Table 1-1.
WP Pin
At GND
Status
At V
1-1.
CC
Write Protect
CC
, the write protection feature is enabled and operates as shown in
Normal read/write operations
Part of the Array Protected
Section 6. “Device Addressing” on page
Atmel AT24C04C/08C
Full array
Section 6. “Device Addressing” on page
Atmel AT24C04C/08C [PRELIMINARY]
9). The AT24C08C only uses the A2 input for
9).
3

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