at25df641a ATMEL Corporation, at25df641a Datasheet - Page 14

• Manufacturer Part Number: at25df641a
• Description: 64-mbit 2.7v Minimum Serial Peripheral Interface Serial Flash Memory
• Manufacturer: ATMEL Corporation

Figure 8-4.
8.3
14
SCK
Block Erase
SOI
CS
Atmel AT25DF641A [Preliminary]
SI
Dual-Input Page Program
MSB
HIGH-IMPEDANCE
1
0
0
While the device is programming, the Status Register can be read and will indicate that the
device is busy. For faster throughput, it is recommended that the Status Register be polled
rather than waiting the t
At some point before the program cycle completes, the WEL bit in the Status Register will be
reset back to the logical “0” state.
The device also incorporates an intelligent programming algorithm that can detect when a byte
location fails to program properly. If a programming error arises, it will be indicated by the EPE
bit in the Status Register.
Figure 8-3.
A block of 4-, 32-, or 64-Kbytes can be erased (all bits set to the logical “1” state) in a single
operation by using one of three different opcodes for the Block Erase command. An opcode of
20h is used for a 4-Kbyte erase, an opcode of 52h is used for a 32-Kbyte erase, and an opcode
of D8h is used for a 64-Kbyte erase. Before a Block Erase command can be started, the Write
Enable command must have been previously issued to the device to set the WEL bit of the Sta-
tus Register to a logical “1” state.
To perform a Block Erase, the CS pin must first be asserted and the appropriate opcode (20h,
52h, or D8h) must be clocked into the device. After the opcode has been clocked in, the three
address bytes specifying an address within the 4-, 32-, or 64-Kbyte block to be erased must be
clocked in. Any additional data clocked into the device will be ignored. When the CS pin is deas-
serted, the device will erase the appropriate block. The erasing of the block is internally self-
timed and should take place in a time of t
1
1
2
OPCODE
0
3
SCK
0
4
SOI
CS
SI
0
5
1
6
Dual-Input Byte Program
0
7
MSB
A
8
A
9
ADDRESS BITS A23-A0
MSB
HIGH-IMPEDANCE
A
1
10 11
0
BP
A
0
1
or t
A
12
1
2
OPCODE
PP
A
0
3
time to determine if the data bytes have finished programming.
0
4
0
5
A
29 30
1
6
A
0
BLKE
7
A
31 32
MSB
A
MSB
D 6
D 7
8
DATA BYTE 1
.
A
9
INPUT
D 4
D 5
33
ADDRESS BITS A23-A0
A
10 11
D 2
D 3
34
A
D 0
D 1
35
A
MSB
12
D 6
D 7
DATA BYTE 2
36
A
INPUT
D 4
D 5
37 38
D 2
D 3
D 0
D 1
A
39
29 30
A
A
31 32
MSB
MSB
D 6
D 7
DATA BYTE n
D 6
D 7
DATA BYTE
INPUT
D 4
D 5
INPUT
D 4
D 5
33
D 2
D 3
D 2
D 3
34
D 0
D 1
D 0
D 1
35
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