at25df161 ATMEL Corporation, at25df161 Datasheet - Page 38

• Manufacturer Part Number: at25df161
• Description: 16-megabit 2.7-volt Minimum Spi Serial Flash Memory
• Manufacturer: ATMEL Corporation

11.1.3
11.1.4
11.1.5
11.1.6
38
AT25DF161 [Preliminary]
WPP Bit
SWP Bits
WEL Bit
RSTE Bit
gram operation aborts for any reason such as an attempt to erase or program a protected region
or a locked down sector, an attempt to erase or program a suspended sector, or if the WEL bit is
not set prior to an erase or program operation. The EPE bit will be updated after every erase and
program operation.
The WPP bit can be read to determine if the WP pin has been asserted or not.
The SWP bits provide feedback on the software protection status for the device. There are three
possible combinations of the SWP bits that indicate whether none, some, or all of the sectors
have been protected using the Protect Sector command or the Global Protect feature. If the
SWP bits indicate that some of the sectors have been protected, then the individual Sector Pro-
tection Registers can be read with the Read Sector Protection Registers command to determine
which sectors are in fact protected.
The WEL bit indicates the current status of the internal Write Enable Latch. When the WEL bit is
in the logical “0” state, the device will not accept any Byte/Page Program, erase, Protect Sector,
Unprotect Sector, Sector Lockdown, Freeze Sector Lockdown State, Program OTP Security
Register, or Write Status Register commands. The WEL bit defaults to the logical “0” state after
a device power-up or reset operation. In addition, the WEL bit will be reset to the logical “0” state
automatically under the following conditions:
If the WEL bit is in the logical “1” state, it will not be reset to a logical “0” if an operation aborts
due to an incomplete or unrecognized opcode being clocked into the device before the CS pin is
deasserted. In order for the WEL bit to be reset when an operation aborts prematurely, the entire
opcode for a Byte/Page Program, erase, Protect Sector, Unprotect Sector, Sector Lockdown,
Freeze Sector Lockdown State, Program OTP Security Register, or Write Status Register com-
mand must have been clocked into the device.
The RSTE bit is used to enable or disable the Reset command. When the RSTE bit is in the log-
ical “0” state (the default state after power-up), the Reset command is disabled and any attempts
to reset the device using the Reset command will be ignored. When the RSTE bit is in the logical
“1” state, the Reset command is enabled.
• Write Disable operation completes successfully
• Write Status Register operation completes successfully or aborts
• Protect Sector operation completes successfully or aborts
• Unprotect Sector operation completes successfully or aborts
• Sector Lockdown operation completes successfully or aborts
• Freeze Sector Lockdown State operation completes successfully or aborts
• Program OTP Security Register operation completes successfully or aborts
• Byte/Page Program operation completes successfully or aborts
• Block Erase operation completes successfully or aborts
• Chip Erase operation completes successfully or aborts
• Hold condition aborts
3687B–DFLASH–11/08