at25128-10si-2.7 ATMEL Corporation, at25128-10si-2.7 Datasheet - Page 9

• Manufacturer Part Number: at25128-10si-2.7
• Description: Spi Serial Eeproms 128k 16,384 X 8 256k 32,768 X 8
• Manufacturer: ATMEL Corporation

Timing Diagrams (for SPI Mode 0 (0, 0))
Figure 3. Synchronous Data Timing
0872O–SEEPR–03/05
SCK
SO
CS
SI
V
V
V
V
V
V
V
V
OH
OL
IH
IH
IH
IL
IL
IL
t
CSS
HI-Z
The AT25128/256 is capable of a 64-byte page write operation. After each byte of data
is received, the six-low order address bits are internally incremented by one; the high-
order bits of the address will remain constant. If more than 64 bytes of data are transmit-
ted, the address counter will roll over and the previously written data will be overwritten.
The AT25128/256 is automatically returned to the write disable state at the completion
of a write cycle.
NOTE: If the device is not Write enabled (WREN), the device will ignore the Write
instruction and will return to the standby state, when CS is brought high. A new CS fall-
ing edge is required to reinitiate the serial communication.
Table 10. Address Key
t
SU
VALID IN
Don’t Care Bits
Address
A
t
N
WH
t
H
t
WL
t
V
AT25128
A
A
15
13
- A
- A
14
0
t
HO
t
CSH
AT25128/256
t
DIS
AT25256
t
A
HI-Z
CS
14
A
15
- A
0
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