at88sc0104c ATMEL Corporation, at88sc0104c Datasheet - Page 60
at88sc0104c
Manufacturer Part Number
at88sc0104c
Description
Cryptomemory Specification For Standard Mode Of Operation
Manufacturer
ATMEL Corporation
Datasheet
1.AT88SC0104C.pdf
(61 pages)
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11. DC Tamper Detection Limits
11.1
11.2
11.3
11.4
11.5
56
Tamper Detection
Applicable over recommended operating range from T
Symbol
V
V
t
f
t
t
CLK
CLK
POR
SUP
cc
cc
High Voltage and Low Voltage Limit
Minimum Clock Pulse
Maximum Clock Frequency
Power On Reset (POR) Delay
Noise Suppression
AT88SC0104/0204/0404/0808/1616/3216/6416/12816/25616C
Parameter
High Voltage Limit
Low Voltage Limit
Minimum CLK pulse width
Minimum CLK frequency
POR Delay
Min. SCL, SDA, RST pulse
The CryptoMemory device family incorporates several tamper detection circuits to prohibit oper-
ation outside the limits of reliable circuit operation.
If V
V
In synchronous operation if the clock pulse width falls below the limit of this circuit the device will
enter a reset sequence.
In asynchronous operation if the clock frequency exceeds the limit of this circuit the device will
enter a reset sequence.
Anytime the device is reset either on initial power up or by a tamper detection circuit, there is a
time delay from when normal conditions are restored to when the device may be operated. Dur-
ing this reset sequence all security flags within the device are reset to their initial values.
Pulses of short duration on SCL/CLK, SDA/IO and RST are ignored if they fall below the thresh-
old of this circuit. The pulses are filtered out and the device does not enter the reset sequence.
CC
CC
is retuned to normal levels and before the device operation can begin again.
is taken below or above these voltage limits the device will enter a reset sequence once
Test Condition
Synchronous Operation
Asynchronous Operation
AC
= -40° to +85° C (unles otherwise noted)
Min
200
6.0
2.0
12
10
50
Typ
Max
280
200
6.5
2.4
14
70
5210A–SMIC–04/07
Units
MHz
nS
uS
uS
V
V