is62lv5128ll Integrated Silicon Solution, Inc., is62lv5128ll Datasheet
is62lv5128ll
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is62lv5128ll Summary of contents
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... CMOS input levels. Additionally, easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62LV5128LL is available in a 36-pin mini BGA power supply package (8mm x 10mm). DECODER ...
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... IS62LV5128LL PIN CONFIGURATION 36-pin mini BGA ( I/ I/ GND E Vcc F I/O6 A18 A17 OE CE I/O7 A16 G A9 A10 A12 A11 H TRUTH TABLE WE CE Mode Not Selected X H Output Disabled H L Read H L Write L L OPERATING RANGE ...
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... IS62LV5128LL ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM V Vcc related to GND CC T Temperature Under Bias BIAS T Storage Temperature STG P Power Dissipation T Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
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... IS62LV5128LL POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions I Vcc Dynamic Operating I OUT Supply Current I Operating Supply Current I OUT I 1 TTL Standby Current V IN (TTL Inputs) CE1 ≥ CMOS Standby Current CE1 ≥ V (CMOS Inputs ...
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... IS62LV5128LL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load AC TEST LOADS 3070 Ω 2.8V OUTPUT 3150 Ω Including jig and scope Figure 1 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. D ...
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... IS62LV5128LL AC WAVEFORMS (1,2) READ CYCLE NO. 1 ADDRESS DOUT (1,3) READ CYCLE NO. 2 ADDRESS OE CE DOUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions OHA DOE t LZOE ...
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... IS62LV5128LL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width t (4) PWE t Data Setup to Write End SD t Data Hold from Write End ...
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... IS62LV5128LL (WE Controlled HIGH During Write Cycle) WRITE CYCLE NO. 2 ADDRESS DOUT DIN (WE Controlled LOW During Write Cycle) WRITE CYCLE NO. 3 ADDRESS DOUT DIN SCE PWE1 HZWE HIGH-Z DATA UNDEFINED t SD DATA-IN VALID ...
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... IS62LV5128LL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V Vcc for Data Retention DR I Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM (CE Controlled 2.7V 2. GND Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. D 05/04/01 Test Condition See Data Retention Waveform Vcc = 2.0V, CE ≥ ...
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... BGA (8mm x 10mm) 85 IS62LV5128LL-85B mini BGA (8mm x 10mm) Package 70 IS62LV5128LL-70BI mini BGA (8mm x 10mm) 85 IS62LV5128LL-85BI mini BGA (8mm x 10mm) Integrated Silicon Solution, Inc. — 1-800-379-4774 ISSI ISSI Integrated Silicon Solution, Inc. 2231 Lawson Lane Santa Clara, CA 95054 Tel: 1-800-379-4774 Fax: (408) 588-0806 E-mail: sales@issi ...