is62lv5128ll Integrated Silicon Solution, Inc., is62lv5128ll Datasheet - Page 7

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is62lv5128ll

Manufacturer Part Number
is62lv5128ll
Description
512k X 8 Low Power And Low Vcc Cmos Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS62LV5128LL
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4V to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the
4. Tested with OE HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
Symbol
t
t
t
t
t
t
t
t
t
t
Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write.
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
(4)
(2)
(2)
ADDRESS
DOUT
CE
DIN
WE
Write Cycle Time
CE to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
Parameter
(CE Controlled, OE = HIGH or LOW)
t
DATA UNDEFINED
SA
t
AW
t
HZWE
t
SCE
t
t
PWE
WC
Min.
70
65
65
60
30
0
0
0
5
(1,3)
(4)
HIGH-Z
-70
(Over Operating Range, Standard and Low Power)
t
SD
DATA-IN VALID
Max.
33
t
HA
t
t
LZWE
HD
Min.
85
70
70
60
35
0
0
0
5
-85
Max.
35
ISSI
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
7

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