is62u6416ll Integrated Silicon Solution, Inc., is62u6416ll Datasheet - Page 7

• Manufacturer Part Number: is62u6416ll
• Description: 64k X 16 Low Voltage, Ultra-low Power Cmos Static Ram Inc
• Manufacturer: Integrated Silicon Solution, Inc.

IS62U6416LL
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V,
2. The internal write time is defined by the overlap of
3. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage.
DATA RETENTION CHARACTERISTICS
DATA RETENTION TIMING DIAGRAM
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION
12/09/98
Symbol
Symbol
t
t
t
t
t
t
t
t
t
t
t
input pulse levels of 0.4V to 1.8V and output loading specified in Figure 1.
signals must be in valid states to initiate a Write, but any one can go inactive to terminate the
Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the
signal that terminates the write.
V
I
t
t
WC
SCE
AW
HA
SA
PWB
PWE
SD
HD
HZWE
LZWE
DR
SDR
RDR
DR
(3)
(3)
Parameter
Write Cycle Time
CE
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
LB
WE
Data Setup to Write End
Data Hold from Write End
WE
WE
Parameter
Vcc for Data Retention
Data Retention Current
Data Retention Set up Time
Recovery Time
,
to Write End
UB
Pulse Width
LOW to High-Z Output
HIGH to Low-Z Output
GND
1.8V
V
V
V
CE
CC
DR
IH
Valid to End of Write
SR034-0C
t
SDR
CE
Test Condition
CE
V
CE
See Data Retention Waveform
See Data Retention Waveform
CC
LOW and
= V
DATA RETENTION MODE
Min.
200
160
160
160
160
160
V
V
—
20
CE
0
0
0
CC
CC
DR
-200
– 0.2V
– 0.2V
V
CC
UB
(1,2)
Max.
– 0.2V
—
—
—
—
—
—
—
—
—
50
—
or
(Over Operating Range)
LB
, and
WE
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LOW. All
t
RDR
Min.
1.5
t
—
RC
0
Max.
5.0
—
—
—
Unit
ns
ns
V
ISSI
A
®
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