is42s16100f-7tla1 Integrated Silicon Solution, Inc., is42s16100f-7tla1 Datasheet - Page 41

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is42s16100f-7tla1

Manufacturer Part Number
is42s16100f-7tla1
Description
512k Words X 16 Bits X 2 Banks 16mb Sdram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS42/45S16100F, IS42VS16100F
Bank Active Command Interval
When the selected bank is precharged, the period trp
has elapsed and the bank has entered the idle state,
the bank can be activated by executing the active
command. If the other bank is in the idle state at that
time, the active command can be executed for that bank
after the period t
banks will be in the active state. When a bank active
command has been executed, a precharge command
must be executed for
Clock Suspend
When the CKe pin is dropped from HIGH to LOW during a
read or write cycle, the SDRAM enters clock suspend mode
on the next CLK rising edge. This command reduces the
device power dissipation by stopping the device internal
clock. Clock suspend mode continues as long as the CKE
pin remains low. In this state, all inputs other than CKe
pin are invalid and no other commands can be executed.
Also, the device internal states are maintained. When the
CKe pin goes from LOW to HIGH clock suspend mode
is terminated on the next CLK rising edge and device
operation resumes.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00C
06/03/2010
CAS latency = 3
CAS latency = 2, burstlength = 4
COMMAND
COMMAND
COMMAND
rrd
CLK
CLK
has elapsed. At that point both
CKE
CLK
DQ
BANK ACTIVE (BANK 0)
BANK ACTIVE (BANK 0)
ACT 0
ACT 0
READ (BANK 0)
READ 0
t
RRD
t
RCD
ACT 1
D
OUT
CLOCK SUSPEND
BANK ACTIVE (BANK 1)
BANK ACTIVE (BANK 0)
0
READ 0
that bank within the ACT to PRe command period (t
Also note that a precharge command cannot be executed
for an active bank before t
After a bank active command has been executed and
the trcd period has elapsed, read write (including auto-
precharge) commands can be executed for that bank.
The next command cannot be executed until the recovery
period (t
Since this command differs from the self-refresh command
described previously in that the refresh operation is not
performed automatically internally, the refresh operation
must be performed within the refresh period (tref). Thus
the maximum time that clock suspend mode can be held
is just under the refresh cycle time.
D
OUT
cka
) has elapsed.
1
D
OUT
ras
2
(min) has elapsed.
D
OUT
3
ras
max).
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