cy62126esl Cypress Semiconductor Corporation., cy62126esl Datasheet

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cy62126esl

Manufacturer Part Number
cy62126esl
Description
1-mbit 64k X 16 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Features
Functional Description
The CY62126ESL is a high performance CMOS static RAM
organized as 64K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
Logic Block Diagram
Cypress Semiconductor Corporation
Document #: 001-45076 Rev. *A
Very high speed: 45 ns
Wide voltage range: 2.2V–3.6V and 4.5V–5.5V
Ultra low standby power
Ultra low active power
Easy memory expansion with CE, and OE features
Automatic power down when deselected
CMOS for optimum speed and power
Available in Pb-free 44-Pin TSOP II package
Typical standby current: 1 μA
Maximum standby current: 4 μA
Typical active current: 1.3 mA at f = 1 MHz
A
A
A
A
A
A
A
A
A
A
A
3
2
1
0
9
8
7
6
5
4
10
198 Champion Court
COLUMN DECODER
DATA IN DRIVERS
®
) in portable
RAM Array
64K x 16
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99 percent when deselected (CE HIGH). The input and
output pins (IO
state when the device is deselected (CE HIGH), the outputs are
disabled (OE HIGH), both Byte High Enable and Byte Low
Enable are disabled (BHE, BLE HIGH) or during a write
operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
specified on the address pins (A
Enable (BHE) is LOW, then data from IO pins (IO
is written into the location specified on the address pins (A
through A
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on IO
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
complete description of read and write modes.
For best practice recommendations, refer to the Cypress
application note
1-Mbit (64K x 16) Static RAM
15
San Jose
).
8
0
AN1064, SRAM System
to IO
through IO
0
through IO
,
15
CA 95134-1709
. See the
IO
IO
0
8
–IO
–IO
CY62126ESL MoBL
15
) are placed in a high impedance
BHE
WE
CE
OE
BLE
7
15
7
) is written into the location
Truth Table
0
through A
Revised June 15, 2009
Guidelines.
on page 10 for a
15
). If Byte High
8
408-943-2600
through IO
0
to IO
7
®
15
. If
0
[+] Feedback
)

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cy62126esl Summary of contents

Page 1

... Available in Pb-free 44-Pin TSOP II package ■ Functional Description The CY62126ESL is a high performance CMOS static RAM organized as 64K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL applications such as cellular telephones ...

Page 2

... Speed [2] Range (V) CC (ns 1MHz Typ 45 1.3 in the range of 3.6V to 4.5V. CC CY62126ESL MoBL Power Dissipation Operating I , (mA) CC Standby, I (μ max [3] [3] [3] Max Typ Max Typ 25°C. CC CC(typ) A Page ® ...

Page 3

... CC IN (Address and Data Only (OE and WE), max = V CC CC(max) – 0.2V, V > V – 0. CC(max) CC (min) and 200 μs wait time after V CC CY62126ESL MoBL Ambient Range Temperature Industrial –40°C to +85°C 2.2V–3.6V, 4.5V–5. [3] Min Typ Max 2.0 2.4 2.4 0.4 0.4 0.4 1 ...

Page 4

... Still Air, soldered 4.5 inch, two-layer printed circuit board ALL INPUT PULSES V CC 90% 10% GND Rise Time = 1 V/ns EQUIVALENT THEVENIN R TH OUTPUT V 3.0V 1103 1554 645 1.75 ® CY62126ESL MoBL Max Unit TSOP II Unit °C/W 28.2 °C/W 3.4 90% 10% Fall Time = 1 V/ns 5.0V Unit Ω 1800 Ω ...

Page 5

... CE > V – 0.2V > V – 0. < 0. DATA RETENTION MODE V V > 1.5V CC(min CDR > 100 μs or stable at V > 100 μ CC(min) CC(min) CY62126ESL MoBL [3] Min Typ Max 1 1. CC(min Page ® Unit V μ [+] Feedback ...

Page 6

... Test Loads and Waveforms” less than less than HZCE LZCE HZBE LZBE HZOE . All signals must be ACTIVE to initiate a write and any of these signals can terminate IL CY62126ESL MoBL 45 ns Unit Min Max ...

Page 7

... IL 14 HIGH for read cycles. 15. Address valid before or similar to CE transition LOW. Document #: 001-45076 Rev OHA DOE t DBE DATA VALID 50% CY62126ESL MoBL [13, 14] DATA VALID [14, 15 HZCE t HZOE t HZBE HIGH IMPEDANCE Page ® ...

Page 8

... During this period, the IOs are in output state. Do not apply input signals. Document #: 001-45076 Rev SCE PWE DATA IN [16, 17 SCE PWE DATA IN ® CY62126ESL MoBL [16, 17 Page [+] Feedback ...

Page 9

... Figure 6. Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) ADDRESS CE BHE/BLE NOTE 18 DATA IO Document #: 001-45076 Rev SCE PWE t SD DATA IN t HZWE SCE PWE t HZWE t SD DATA IN ® CY62126ESL MoBL [17 LZWE [17 LZWE Page [+] Feedback ...

Page 10

... Write –IO in High Data In (IO –IO ); Write –IO in High Package Package Type Diagram 51-85087 44-Pin TSOP II (Pb-free) CY62126ESL MoBL Mode Power Standby ( Active ( Active ( Active ( Active ( Active ( Active ( Active (I ...

Page 11

... Package Diagrams Figure 7. 44-Pin Thin Small Outline Package Type II, 51-85087 Document #: 001-45076 Rev. *A ® CY62126ESL MoBL 51-85087-*A Page [+] Feedback ...

Page 12

... Document History Page ® Document Title: CY62126ESL MoBL Document Number: 001-45076 Revision ECN Submission Date ** 2610988 11/21/08 *A 2718906 06/15/2009 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress ...

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