w9425g6eh Winbond Electronics Corp America, w9425g6eh Datasheet - Page 29
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w9425g6eh
Manufacturer Part Number
w9425g6eh
Description
4 M ? 4 Banks ? 16 Bits Ddr Sdram
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W9425G6EH.pdf
(53 pages)
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(11) IF the result of nominal calculation with regard to t
(12) V
(13) V
(14) V
(15) Refer to the figure below.
(16) t
(17) A maximum of eight AUTO REFRESH commands can be posted to any given DDR SDRAM device.
(18) t
(19) For command/address input slew rate ≥1.0 V/nS.
(20) For command/address input slew rate ≥0.5 V/nS and <1.0 V/nS.
(21) For CLK & CLK slew rate ≥1.0 V/nS (single--ended).
(22) These parameters guarantee device timing, but they are not necessarily tested on each device. They may be
(23) Slew Rate is measured between V
the nearest decimal place.
(i.e., T
guaranteed by device design or tester correlation.
AC
DAL
X
ID
ISO
0 V Differential
is the differential clock cross point voltage where input timing measurement is referenced.
and t
is magnitude of the difference between CLK input level and CLK input level.
= (t
means {V
DQSS
WR
DQSCK
V
/t
ID(AC)
= 0.75 × t
V
CLK
CLK
CK
V
V
ISO
SS
SS
) + (t
ICK
depend on the clock jitter. These timing are measured at stable clock.
(CLK)+V
V
ICK
RP
V
CK
/t
X
CK
, t
)
CK
ICK
= 7.5 nS, 0.75 × 7.5 nS = 5.625 nS is rounded up to 5.6 nS.)
( CLK )}/2.
V
OH
ISO(min)
V
(ac) and V
V
ICK
X
OL
CK
(ac).
- 29 -
contains more than one decimal place, the result is rounded up to
V
X
V
ISO(max)
V
ICK
Publication Release Date:May 07, 2008
V
X
V
ICK
W9425G6EH
V
X
V
ID(AC)
Revision A05