cat34c02 Catalyst Semiconductor, cat34c02 Datasheet - Page 8

• Manufacturer Part Number: cat34c02
• Description: 2-kb I?c Eeprom For Ddr2 Dimm Serial Presence Detect
• Manufacturer: Catalyst Semiconductor

CAT34C02
READ OPERATIONS
Immediate Address Read
In standby mode, the CAT34C02 internal address counter
points to the data byte immediately following the last byte
accessed by a previous operation. If that ‘previous’ byte
was the last byte in memory, then the address counter
st
will point to the 1
memory byte, etc.
When, following a START, the CAT34C02 is presented
with a Slave address containing a ‘1’ in the R/W bit
th
position (Figure 9), it will acknowledge (ACK) in the 9
clock cycle, and will then transmit data being pointed
at by the internal address counter. The Master can stop
further transmission by issuing a NoACK, followed by a
STOP condition.
Selective Read
The Read operation can also be started at an address
different from the one stored in the internal address coun-
ter. The address counter can be initialized by performing
a ‘dummy’ Write operation (Figure 10). Here the START
is followed by the Slave address (with the R/W bit set
to ‘0’) and the desired byte address. Instead of follow-
nd
ing up with data, the Master then issues a 2
START,
followed by the ‘Immediate Address Read’ sequence,
as described earlier.
Sequential Read
st
If the Master acknowledges the 1
data byte transmitted
by the CAT34C02, then the device will continue trans-
mitting as long as each data byte is acknowledged by
the Master (Figure 11). If the end of memory is reached
during sequential Read, then the address counter will
‘wrap-around’to the beginning of memory, etc. Sequential
Read works with either ‘Immediate Address Read’ or
‘Selective Read’, the only difference being the starting
byte address.
© Catalyst Semiconductor, Inc.
Doc. No. MD-1095, Rev. K
8
Characteristics subject to change without notice