is24c128-3z Integrated Silicon Solution, Inc., is24c128-3z Datasheet - Page 3

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is24c128-3z

Manufacturer Part Number
is24c128-3z
Description
262,144-bit/131,072-bit 2-wire Serial Cmos Eeprom
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
PIN DESCRIPTIONS
SCL
This input clock pin is used to synchronize the data transfer
to and from the device.
SDA
The SDA is a Bi-directional pin used to transfer addresses
and data into and out of the device. The SDA pin is an open
IS24C128-2/3
IS24C256-2/3
8-Pin DIP and SOIC
Integrated Silicon Solution, Inc. — www.issi.com —
ADVANCED INFORMATION Rev. 00B
07/02/02
PIN CONFIGURATION
A0-A1
SDA
SCL
WP
Vcc
GND
GND
NC
A0
A1
Serial Address/Data I/O
Serial Clock Input
Write Protect Input
Power Supply
Ground
Address Inputs
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
1-800-379-4774
14-pin TSSOP
drain output and can be wire-Ored with other open drain or
open collector outputs. The SDA bus requires a pullup
resistor to Vcc.
A0, A1
The A0, and A1 are the device address inputs that are
hardwired or left not connected for hardware compatibility
with the 24C32/64. When pins are hardwired, as many as
four 128K/265K devices may be addressed on a single bus
system. When the pins are not hardwired, the default A0 and
A1 are zero.
WP
WP is the Write Protect pin. If the WP pin is tied to Vcc the
entire array becomes Write Protected (Read only). When
WP is tied to GND or left floating normal read/write operations
are allowed to the device.
GND
NC
NC
NC
NC
A0
A1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
ISSI
VCC
WP
NC
NC
NC
SCL
SDA
®
3

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