s-8244aafph-ceftfg Seiko Instruments Inc., s-8244aafph-ceftfg Datasheet - Page 11
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s-8244aafph-ceftfg
Manufacturer Part Number
s-8244aafph-ceftfg
Description
Battery Protection Ic For 1-serial To 4-serial-cell Pack Secondary Protection
Manufacturer
Seiko Instruments Inc.
Datasheet
1.S-8244AAFPH-CEFTFG.pdf
(27 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S-8244AAFPH-CEFTFG
Manufacturer:
PHI
Quantity:
28 500
Rev.3.5
Operation
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Overcharge Detection
Delay Circuit
CO is turned to “H” (for CMOS output active “H” or Nch open drain models) or “L” (for CMOS output active “L” or
Pch open drain models) when the voltage of one of the batteries exceeds the overcharge detection voltage (V
during charging under normal conditions beyond the overcharge detection delay time (t
“overcharge.”
overcharge state is maintained until the voltage of all batteries decreases from the overcharge detection voltage
(V
The delay circuit rapidly charges the capacitor connected to the delay capacitor connection pin up to a specified
voltage when the voltage of one of the batteries exceeds the overcharge detection voltage (V
circuit gradually discharges the capacitor at 100 nA and inverts the CO output when the voltage at the delay
capacitor connection pin goes below a specified level. Overcharge detection delay time (t
upon the external capacitor.
Each delay time is calculated using the following equation.
Because the delay capacitor is rapidly charged, the smaller the capacitance, the larger the difference between the
maximum voltage and the specified value of delay capacitor pin (ICT pin). This will cause a deviation between the
calculated delay time and the resultant delay time. Also, delay time is internally set in this IC to prevent the CO
output from inverting until the charge to delay capacitor pin is reached to the specified voltage.
capacitance is used, output may be enabled without delay time because charge is disabled within the internal delay
time.
Please note that the maximum capacitance connected to the delay capacitor pin (ICT pin) is 1 µ F.
_00
CU
) by the equivalent to the overcharge hysteresis voltage (V
t
CU
[s] = Delay Coefficient (10,
Attaching FET to the CO pin provides charge control and a second protection. At that time, the
Min.
Seiko Instruments Inc.
Typ.
15,
Max.
20) × C
ICT
CD
[ µ F]
).
CU
). This state is called
CU
CU
S-8244 Series
). Then, the delay
) varies depending
If large
CU
11
)