stm8af6148 STMicroelectronics, stm8af6148 Datasheet
stm8af6148
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stm8af6148 Summary of contents
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... user pins including 10 high sink I/Os ■ Highly robust I/O design, immune against current injection Table 1. Part numbers: STM8AF61xx/STM8AH61xx STM8AF6168, STM8AF6148, STM8AF6166, STM8AF6146, STM8AH6168, STM8AH6148, STM8AH6166, STM8AH6146 1. This datasheet applies to product versions with and without data EEPROM. The order code identifier is ‘F’ or ‘H’ respectively. ...
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Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8AF61xx STM8AH61xx 5.7.4 5.8 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Contents 11.3.8 11.3.9 11.3.10 10-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8AF61xx STM8AH61xx List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures List of figures Figure 1. STM8A block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8AF61xx STM8AH61xx 1 Introduction This datasheet refers to the STM8AF61xx and STM8AH61xx products with Kbytes of program memory. The STM8AF61xx and STM8AH61xx are hereafter referred to as the STM8AF/H61xx. ‘F’ refers to product versions with data EEPROM ...
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Description 2 Description The STM8A automotive 8-bit microcontrollers offer from Kbytes of program memory and integrated true data EEPROM. All devices of the STM8A product line provide the following benefits: ● Reduced system cost – Integrated true ...
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STM8AF61xx STM8AH61xx 3 Product line-up ² Table 2. STM8AF/H61xx product line-up Order code Package (bytes) STM8AF/H6168T LQFP48 (1) (7x7) STM8AF/H6148T STM8AF/H6166T LQFP32 (1) (7x7) STM8AF/H6146T 1. Also QFN package available Prog. RAM Data EE 10-bit (bytes) (bytes) A/D ch. 32 ...
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Block diagram 4 Block diagram Figure 1. STM8A block diagram Reset Single wire debug interf. Master/slave autosynchro 400 Kbit/s 8 Mbit/s 16 channels 10/90 Reset block Clock controller Reset Detector POR PDR Clock to peripherals and core STM8A CORE Debug/SWIM ...
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STM8AF61xx STM8AH61xx 5 Product overview The following section intends to give an overview of the basic features of the STM8A functional modules and peripherals. For more detailed information please refer to the STM8A microcontroller family reference manual (RM0009). 5.1 Central ...
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Product overview 5.2 Single wire interface module (SWIM) and debug module The single wire interface module, SWIM, together with an integrated debug module, permits non-intrusive, real-time in-circuit debugging and fast memory programming. 5.2.1 SWIM Single wire interface for direct access ...
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STM8AF61xx STM8AH61xx 5.4.2 Write protection (WP) Write protection in application mode is intended to avoid unintentional overwriting of the memory in case of user software malfunction. Code update in user mode is still possible after execution of a specific MASS ...
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Product overview 5.4.3 Read-out protection (ROP) STM8A devices provide a read-out protection of the code and data memory by programming the lock byte at address 4800h with the value AAh. Read-out protection prevents reading and writing the program and data ...
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STM8AF61xx STM8AH61xx 5.5 Low-power operating modes The product features various low-power modes: ● Slow mode: Prescaled CPU clock, selected peripherals at full clock speed ● Active halt mode: CPU and peripheral clocks are stopped ● Halt mode: CPU and peripheral ...
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Product overview 5.6.2 Internal 16 MHz RC oscillator ● Default clock after reset 2 MHz (16 MHz/8) ● Wake-up time: < 2 µs User trimming The register CLK_HSITRIMR permits frequency tuning to a precision the application program. ...
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STM8AF61xx STM8AH61xx 5.7 Timers 5.7.1 Watchdog timers The watchdog system is based on two independent timers providing maximum security to the applications. The WDG timer activity is controlled by the application program or option bytes. Once the watchdog is activated, ...
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Product overview 5.7.3 Multipurpose and PWM timers STM8A devices described in this datasheet, contain up to three 16-bit multipurpose and PWM timers providing nine CAPCOM channels in total. Table 3. STM8A timer configuration Timer Counter Timer1 Timer2 16 Timer3 Timer4 ...
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STM8AF61xx STM8AH61xx 5.8 ADC The STM8A products described in this datasheet, contain a 10-bit successive approximation ADC with 10 multiplexed input channels. General features: ● 10-bit ADC with channels ● Input voltage range ● ...
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Product overview LIN slave ● Autonomous header handling - one single interrupt per valid message header ● Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 % ● Synch delimiter checking ● 11-bit LIN synch break detection - ...
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STM8AF61xx STM8AH61xx 2 5.9 ● master features: – Clock generation – Start and stop generation ● slave features: – Programmable I – Stop bit detection ● Generation and detection of 7-bit/10-bit addressing ...
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Pinouts and pin description 6 Pinouts and pin description 6.1 Package pinouts Figure 3. LQFP 48-pin pinout 22/ NRST 1 OSCIN/PA1 2 OSCOUT/PA2 SSIO_1 V ...
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STM8AF61xx STM8AH61xx Figure 4. LQFP 32-pin pinout 6.2 Pin description Table 4. Legend/abbreviation for Type Level Output speed Port and control configuration Reset state is shown in bold NRST 1 OSCIN/PA1 2 ...
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Pinouts and pin description Table 5. STM8A 32 Kbyte microcontroller pin description Pin number Pin name 1 1 NRST I PA1/OSCIN I PA2/OSCOUT I SSIO_1 ...
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STM8AF61xx STM8AH61xx Table 5. STM8A 32 Kbyte microcontroller pin description (continued) Pin number Pin name 24 PE6/AIN9 I PE5/SPI_NSS I PC1/TIM1_CC1 I PC2/TIM1_CC2 I PC3/TIM1_CC3 I ...
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Pinouts and pin description Table 5. STM8A 32 Kbyte microcontroller pin description (continued) Pin number Pin name PD6 I/O X LINUART_RX 48 32 PD7/TLI I the open-drain output column, ‘T’ defines a true open-drain I/O ...
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STM8AF61xx STM8AH61xx 7 Memory map Figure 5. Register and memory map of STM8A products Table 6. Stack and RAM partitioning Product Kbytes 32 00 0000 Kbytes RAM Up to 0.5 Kbyte stack 00 0800 Reserved 00 4000 ...
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Interrupt table 8 Interrupt table Table 7. STM8A interrupt table Source Priority block - Reset - TRAP 0 TLI 1 AWU Clock 2 controller 3 MISC 4 MISC 5 MISC 6 MISC 7 MISC 8 CAN 9 CAN 10 SPI ...
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STM8AF61xx STM8AH61xx Table 7. STM8A interrupt table (continued) Source Priority block 22 ADC 23 Timer 4 24 Reserved 1. Also unused interrupts should be initialized with “IRET” for robust programming. Interrupt vector Description address End of conversion 8060h Update/overflow 8064h ...
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Register mapping 9 Register mapping Table 8. STM8A I/O port hardware register map Address Block 00 5000h 00 5001h 00 5002h Port A 00 5003h 00 5004h 00 5005h 00 5006h 00 5007h Port B 00 5008h 00 5009h 00 ...
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STM8AF61xx STM8AH61xx Table 8. STM8A I/O port hardware register map (continued) Address Block 00 501Eh 00 501Fh 00 5020h Port G 00 5021h 00 5022h 00 5023h 00 5024h 00 5025h Port H 00 5026h 00 5027h 00 5028h 00 ...
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Register mapping Table 9. STM8A general hardware register map Address Block 00 5050h to 00 5059h 00 505Ah 00 505Bh 00 505Ch Flash 00 505Dh 00 505Eh 00 505Fh 00 5060h to 00 5061h 00 5062h Flash 00 5063h 00 ...
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STM8AF61xx STM8AH61xx Table 9. STM8A general hardware register map (continued) Address Block 00 50C3h 00 50C4h 00 50C5h 00 50C6h 00 50C7h CLK 00 50C8h 00 50C9h 00 50CAh 00 50CBh 00 50CCh 00 50CDh 00 50CEh to 00 50D0h ...
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Register mapping Table 9. STM8A general hardware register map (continued) Address Block 00 5200h 00 5201h 00 5202h 00 5203h SPI 00 5204h 00 5205h 00 5206h 00 5207h 00 5208h to 00 520Fh 00 5210h 00 5211h 00 5212h ...
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STM8AF61xx STM8AH61xx Table 9. STM8A general hardware register map (continued) Address Block 00 5240h 00 5241h 00 5242h 00 5243h 00 5244h 00 5245h LINUART 00 5246h 005247h 00 5248h 00 5249h 00 524Ah 00 524Bh 00 524Ch to 00 ...
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Register mapping Table 9. STM8A general hardware register map (continued) Address Block 00 5250h 00 5251h 00 5252h 00 5253h 00 5254h 00 5255h 00 5256h 00 5257h 00 5258h 00 5259h 00 525Ah 00 525Bh 00 525Ch 00 525Dh ...
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STM8AF61xx STM8AH61xx Table 9. STM8A general hardware register map (continued) Address Block 00 5300h 00 5301h 00 5302h 00 5303h 00 5304h 00 5305h 00 5306h 00 5307h 00 5308h 00 5309h 00 530Ah TIM2 00 530Bh 00 530Ch 00 ...
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Register mapping Table 9. STM8A general hardware register map (continued) Address Block 00 5320h 00 5321h 00 5322h 00 5323h 00 5324h 00 5325h 00 5326h 00 5327h 00 5328h TIM3 00 5329h 00 532Ah 00 532Bh 00 532Ch 00 ...
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STM8AF61xx STM8AH61xx Table 9. STM8A general hardware register map (continued) Address Block 53E0h 53E1h 53E2h 53E3h 53E4h 53E5h 53E6h 53E7h 53E8h 53E9h ADC 53EAh 53EBh 53ECh 53EDh 53EEh 53EFh 53F0h 53F1h 53F2h 53F3h 53F4h to 5F3FFh 00 5400h 00 5401h ...
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Register mapping Table 9. STM8A general hardware register map (continued) Address Block 00 5408h 00 5409h 00 540Ah 00 540Bh ADC 00 540Ch 00 540Dh 00 540Eh 00 540Fh 00 5410h to 00 57FFh 5800h 5801h 5802h 5803h 5804h TMU ...
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STM8AF61xx STM8AH61xx Table 10. CPU/SWIM/debug module/interrupt controller registers Address Block 00 7F00h 00 7F01h 00 7F02h 00 7F03h 00 7F04h 00 7F05h CPU 00 7F06h 00 7F07h 00 7F08h 00 7F09h 00 7F0Ah 00 7F0Bh to 00 7F5Fh 00 7F60h ...
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Register mapping Table 10. CPU/SWIM/debug module/interrupt controller registers (continued) Address Block 00 7F90h 00 7F91h 00 7F92h 00 7F93h 00 7F94h 00 7F95h 00 7F96h 00 7F97h 00 7F98h 00 7F99h 00 7F9Ah 00 7F9Bh to 00 7F9Fh 42/90 Register ...
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STM8AF61xx STM8AH61xx 10 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated block of the memory. Except for the ROP (read-out protection) byte, each ...
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Option bytes Table 11. Option bytes (continued) Option Option Addr. name byte no. 4810h OPT8 4811h OPT9 4812h OPT10 4813h OPT11 4814h TMU OPT12 4815h OPT13 4816h OPT14 4817h OPT15 4818h OPT16 4819h to 487D 487E OPT17 Boot- loader 487F ...
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STM8AF61xx STM8AH61xx Table 12. Option byte description Option byte no. OPT0 OPT1 OPT2 Description ROP[7:0]: Memory readout protection (ROP) AAh: Enable readout protection (write access via SWIM protocol) Note: Refer to the STM8A microcontroller family reference manual (RM0009) section on ...
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Option bytes Table 12. Option byte description (continued) Option byte no. OPT3 OPT4 OPT5 OPT6 OPT7 OPT8 OPT9 OPT10 46/90 Description 16MHZTRIM0: Trimming option for 16 MHz internal RC oscillator 0: 3-bit on-the-fly trimming (compatible with 128 Kbyte device) 1: ...
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STM8AF61xx STM8AH61xx Table 12. Option byte description (continued) Option byte no. OPT11 OPT12 OPT13 OPT14 OPT15 OPT16 OPT17 Description TMU_KEY 3 [7:0]: Temporary unprotection key 3 Temporary unprotection key: Must be different from 00h or FFh TMU_KEY 4 [7:0]: Temporary ...
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Electrical characteristics 11 Electrical characteristics 11.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 11.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...
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STM8AF61xx STM8AH61xx 11.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 7. Pin input voltage 11.2 Absolute maximum ratings Stresses above those listed as ‘absolute maximum ratings’ may cause permanent damage ...
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Electrical characteristics Table 14. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by any I/O and control pin I IO Output current source by any I/Os and control pin ...
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STM8AF61xx STM8AH61xx 11.3 Operating conditions Table 16. General operating conditions Symbol f Internal CPU clock frequency CPU V V Standard operating voltage DD/ DD_IO Junction temperature range J Figure 8. f CPUmax Functionality not guaranteed in this ...
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Electrical characteristics Table 17. Operating conditions at power-up/power-down Symbol Parameter V rise time rate DD t VDD V fall time rate DD Reset release delay t TEMP Reset generation (3) delay Power-on reset V IT+ threshold Brown-out reset V IT- ...
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STM8AF61xx STM8AH61xx Table 18. Total current consumption in run, wait and slow mode at V Symbol Parameter Supply I current in DD(RUN) run mode Supply I current in DD(RUN) run mode Supply I current in DD(RUN) run mode Supply I ...
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Electrical characteristics Table 18. Total current consumption in run, wait and slow mode at V Symbol Parameter Supply I current in DD(SLOW) slow mode 1. Prodution test limits Table 19. Total current consumption and timing in halt, fast active halt ...
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STM8AF61xx STM8AH61xx Table 20. Total current consumption in run, wait and slow mode at V Symbol Parameter Supply I current in DD(RUN) run mode Supply I current in DD(RUN) run mode Supply I current in DD(RUN) run mode Supply I ...
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Electrical characteristics Table 20. Total current consumption in run, wait and slow mode at V Symbol Parameter Supply I current in DD(SLOW) slow mode 56/90 Conditions HSE external clock 16 MHz/128 CPU MASTER f scaled down, CPU ...
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STM8AF61xx STM8AH61xx Table 21. Total current consumption and timing in halt, fast active halt and slow active halt modes at V Symbol I Supply current in halt mode DD(H) Supply current in fast active halt I DD(FAH) mode Supply current ...
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Electrical characteristics On-chip peripherals Table 22. Typical peripheral current consumption V Symbol I TIM1 supply current DD(TIM1) I TIM2 supply current DD(TIM2) I TIM3 supply current DD(TIM3) I TIM4 supply current DD(TIM4) I USART supply current DD(USART) I LINUART supply ...
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STM8AF61xx STM8AH61xx Current consumption curves Figure 9 to Figure 14 show typical current consumption measured with code executing in RAM. Figure 9. Typ. I DD(RUN)HSE @ MHz, periph = on CPU ...
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Electrical characteristics 11.3.2 External clock sources and timing characteristics HSE user external clock Subject to general operating conditions for V Table 23. HSE user external clock characteristics Symbol User external clock source f HSE_ext frequency V Comparator hysteresis HSEdHL OSCIN ...
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STM8AF61xx STM8AH61xx Table 24. HSE oscillator characteristics Symbol Parameter R Feedback resistor F (1) C Recommended load capacitance I HSE oscillator power consumption DD(HSE) g Oscillator transconductance m (3) t Startup time SU(HSE approximately equivalent to 2 ...
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Electrical characteristics 11.3.3 Internal clock sources and timing characteristics Subject to general operating conditions for V High speed internal RC oscillator (HSI) Table 25. HSI oscillator characteristics Symbol Parameter f Frequency HSI HSI oscillator user trimming accuracy ACC HS HSI ...
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STM8AF61xx STM8AH61xx Low speed internal RC oscillator (LSI) Subject to general operating conditions for V Table 26. LSI oscillator characteristics Symbol f Frequency LSI t LSI oscillator wake-up time su(LSI) 1. Data based on characterization results, not tested in production. ...
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Electrical characteristics 11.3.4 Memory characteristics RAM and hardware registers Table 27. RAM and hardware registers Symbol V Data retention mode RM 1. Minimum supply voltage without losing data stored in RAM (in halt mode or under reset hardware ...
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STM8AF61xx STM8AH61xx 11.3.5 I/O port pin characteristics General characteristics Subject to general operating conditions for V unused pins must be kept at a fixed voltage, using the output mode of the I/O for example or an external pull-up or pull-down ...
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Electrical characteristics Figure 19. Typical Figure 20. Typical pull-up resistance Figure 21. Typical pull-up current I Note: The pull- pure resistor (slope ...
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STM8AF61xx STM8AH61xx Typical output level curves Figure 22 to Figure 31 show typical output level curves measured with output on a single pin. Figure 22. Typ ports) -40°C 1.5 25°C 85°C 1.25 125°C 1 0.75 ...
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Electrical characteristics Figure 28. Typ (standard ports) -40°C 2 25°C 1.75 85°C 125°C 1.5 1.25 1 0.75 0.5 0. [mA] OH Figure 30. Typ ...
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STM8AF61xx STM8AH61xx 11.3.6 Reset pin characteristics Subject to general operating conditions for V Table 30. NRST pin characteristics Symbol V NRST input low level voltage IL(NRST) V NRST input high level voltage IH(NRST) V NRST output low level voltage OL(NRST) ...
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Electrical characteristics Figure 33. Typical NRST pull-up resistance Figure 34. Typical NRST pull-up current I 140 120 100 The reset network shown in must ensure that the level on the NRST pin ...
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STM8AF61xx STM8AH61xx 11.3.7 TIM and 4 timer characteristics Subject to general operating conditions for V Table 31. TIM characteristics Symbol t Input capture pulse time w(ICAP)in t Timer resolution time res(TIM) f Timer external ...
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Electrical characteristics SPI serial peripheral interface 11.3.8 Unless otherwise specified, the parameters given in performed under ambient temperature, f conditions. t MASTER Refer to I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). ...
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STM8AF61xx STM8AH61xx Figure 36. SPI timing diagram where slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure ...
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Electrical characteristics Figure 38. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are at CMOS levels: 0.3 V 74/90 ...
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STM8AF61xx STM8AH61xx 2 11.3 interface characteristics 2 Table 33 characteristics Symbol t SCL clock low time w(SCLL) t SCL clock high time w(SCLH) t SDA setup time su(SDA) t SDA data hold time h(SDA) t SDA ...
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Electrical characteristics 11.3.10 10-bit ADC characteristics Subject to general operating conditions for V specified. Table 34. ADC characteristics Symbol f ADC clock frequency ADC V Analog supply DDA V Positive reference voltage REF+ V Negative reference voltage REF- V Conversion ...
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STM8AF61xx STM8AH61xx Table 35. ADC accuracy with R Symbol |E | Total unadjusted error Offset error Gain error Differential linearity error Integral linearity error L 1. TBD = ...
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Electrical characteristics Figure 40. Typical application with ADC V AIN 11.3.11 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) While executing a simple application (toggling 2 LEDs through I/O ports), the ...
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STM8AF61xx STM8AH61xx Table 37. EMS data Symbol Voltage limits to be applied on any I/O pin to V FESD induce a functional disturbance Fast transient voltage burst limits applied through 100 EFTB pins to ...
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... Symbol Static latch-up class LU 1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to class A it exceeds the JEDEC standard. B class strictly covers all the JEDEC criteria (international standard). ...
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STM8AF61xx STM8AH61xx 11.4 Thermal characteristics The maximum chip junction temperature (T Table 16: General operating conditions on page 51 The maximum chip-junction temperature, T using the following equation: Where: is the maximum ambient temperature in ° C – T Amax ...
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Electrical characteristics 11.4.2 Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the order code (see Figure 43: STM8A order codes on page 86 The following example shows how to calculate the temperature range ...
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STM8AF61xx STM8AH61xx 12 Package characteristics To meet environmental requirements, ST offers these devices in ECOPACK These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, ...
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Package characteristics 12.1 Package mechanical data Figure 41. 48-pin low profile quad flat package ( Table 42. 48-pin low profile quad flat package mechanical data Dim θ L ...
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STM8AF61xx STM8AH61xx Figure 42. 32-pin low profile quad flat package ( Table 43. 32-pin low profile quad flat package mechanical data Dim θ Values in ...
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Ordering information 13 Ordering information Figure 43. STM8A order codes STM8A Product family STM8A....8-bit microcontroller Program memory type F....Flash + EEPROM P....FASTROM no EEPROM H....Flash no EEPROM Q....FASTROM + EEPROM Device family 5x - CAN/LIN 6x - LIN only 1. ...
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... In addition, STM8A application development is supported by a low-cost in-circuit debugger/programmer. The STice is the fourth generation of full-featured emulators from STMicroelectronics. It offers new advanced debugging capabilities including tracing, profiling and code coverage analysis to help detect execution bottlenecks and dead code. ...
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... Software tools STM8 development tools are supported by a complete, free software package from STMicroelectronics that includes ST visual develop (STVD) IDE and the ST visual program- mer (STVP) software interface. STVD provides seamless integration of the Cosmic C com- piler for STM8, which is available in a free version that outputs Kbytes of code. ...
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STM8AF61xx STM8AH61xx 15 Revision history Table 44. Document revision history Date 22-Aug-2008 Revision Rev 1 Initial release Revision history Changes 89/90 ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...